An output signal can be free of any noise component generated from an amplifier disposed in a path, without degradation of the S/N ratio of the output signal. An amplifier includes: a first amplifier that is connected to an input node and generates a first intermediate signal; a feedback resistor that enables feedback of the first intermediate signal to the input node; an attenuator that receives the first intermediate signal and generates a second intermediate signal; a second amplifier that is connected to the input node and generates a third intermediate signal; a third amplifier that is connected to the input node and generates a fourth intermediate signal; and an adder that generates an output signal, using the second intermediate signal, the third intermediate signal, and the fourth intermediate signal.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a variable gain amplifier that includes a first transistor and a second transistor whose gate terminals are coupled to a first input terminal. A first drain terminal of the first transistor and a first source terminal of the second transistor is coupled to a voltage gain control switch. There are other embodiments as well.

An oscillator unit for a vehicle detector includes an oscillator circuit for generating vehicle detector loop signals in response to enabling control signals from a vehicle detector control unit, a gain control circuit for maintaining the amplitude of the oscillator output signals within a limited range, and a clamping circuit for eliminating ringing of the oscillator output signals when operation of the oscillator circuit is disabled. The gain control circuit eliminates random amplitude changes in the vehicle detector loop signals generated by the oscillator circuit caused by changing environmental conditions experienced by the vehicle detector loop. The clamping circuit provides immediate clamping of the oscillator circuit operation to eliminate ringing when the control signal switches to the off state. The few additional circuit components which provide the gain control and clamping functions add very little to the overall cost of the oscillator circuit.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

A low-power semiconductor device is provided. A retention transistor is provided between a control circuit and an output transistor. An output terminal of the control circuit is electrically connected to one of a source and a drain of the retention transistor, and the other of the source and the drain of the retention transistor is electrically connected to a gate of the output transistor. A node to which the other of the source and the drain of the retention transistor and the gate of the output transistor are electrically connected is a retention node. When the retention transistor is in an on state, a potential corresponding to a potential output from the control circuit is written to the retention node. Then, when the retention transistor is in an off state, the potential of the retention node is retained. Thus, a gate potential of the output transistor can be kept at a constant value even when the control circuit is off. Accordingly, even when the control circuit is off, a constant potential can be continuously output from one of a source and a drain of the output transistor, for example.

A computer-implemented method comprising: determining one or more features of a subject signal; revising one or more control signals on the basis of the one or more features; modifying a level of the subject signals based on the control signals. At least one of the features is determined by: comparing a given one of the subject signals against a boundary signal to produce a corresponding given boundary comparison signal; and summarizing the behavior of the given boundary comparison signal over a time interval.

A computer-implemented method comprising: determining one or more features of a subject signal; revising one or more control signals on the basis of the one or more features; modifying a level of the subject signals based on the control signals. At least one of the features is determined by: comparing a given one of the subject signals against a boundary signal to produce a corresponding given boundary comparison signal; and summarizing the behavior of the given boundary comparison signal over a time interval.

An integrated circuit amplifier configurable to be either a programmable gain amplifier or an operational amplifier comprises two output blocks, one output block is optimized for programmable gain amplifier operation, and the other output block is optimized for operational amplifier applications. A common single input stage, input offset calibration and bias generation circuits are used with either amplifier configuration. Thus duplication of the input stage, offset calibration and bias generation circuits are eliminated while still selectably providing for either a programmable gain amplifier or operational amplifier configuration.

A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction.

A device includes: a transistor having an input terminal configured to receive an input signal and to amplify the input signal; a bias current source configured to set a bias current of the input terminal of the transistor, the bias current source having a control input for receiving a control signal for selecting the bias current to have one of a plurality of selectable bias current levels; a bias resistance connected between the bias current source and the input terminal of the transistor; a bypass switch for selectively bypassing a first part of the bias resistance; and a control circuit for controlling the bypass switch to bypass the part of the bias resistance for a predefined time period in response to a change in the bias current level, and for controlling the bypass switch to stop bypassing the first part of the bias resistance after the predefined time period expires.