An on-board electric compressor that comprises: a housing; a compression unit; an electric motor; and an inverter device. The inverter device comprises: an inverter circuit that converts direct current power to alternating current power; and a noise reduction unit that is provided on an input side of the inverter circuit and that reduces common mode noise and normal mode noise that are included in the direct current power The noise reduction unit comprises: a common mode choke coil; and a smoothing capacitor that, in cooperation with the common mode choke coil, constitutes a low pass filter circuit. The common mode choke coil has: a core that has a first core part and a second core part; a first winding that is wound around the first core part; and a second winding that is wound around the second core part.

A glass wiring board is provided with an analog duplexer including an inductor and a capacitor, and includes: a core wiring board provided with the coil-shaped inductor having through electrodes and wiring patterns provided in a glass substrate via an inorganic adhesive layer, and with a land pattern connected to an outer layer; the capacitor having a structure with a dielectric layer sandwiched between upper and lower electrode patterns on an insulating resin layer covering the core wiring board; and a wiring pattern for connecting to an external component such as an external substrate.

An integrated circuit device includes first and second temperature sensors, an A/D conversion circuit that performs A/D conversion on first and second temperature detection voltages from the first and second temperature sensors and outputs first and second temperature detection data, a connection terminal that is electrically connected to a temperature detection target device of the first and second temperature sensors, and a digital signal processing circuit that performs digital calculation based on the first and second temperature detection data and performs a temperature compensation process of correcting temperature characteristics of the temperature detection target device.

An integrated circuit device includes first and second temperature sensors, an A/D conversion circuit that performs A/D conversion on first and second temperature detection voltages from the first and second temperature sensors and outputs first and second temperature detection data, a connection terminal that is electrically connected to a temperature detection target device of the first and second temperature sensors, and a digital signal processing circuit that performs digital calculation based on the first and second temperature detection data and performs a temperature compensation process of correcting temperature characteristics of the temperature detection target device.

An integrated circuit device includes a digital signal processing circuit that generates frequency control data by performing a temperature compensation process by a neural network calculation process based on temperature detection data and an amount of change in time of the temperature detection data, and an oscillation signal generation circuit that generates an oscillation signal of a frequency set by the frequency control data using a resonator.

An integrated circuit device includes a digital signal processing circuit that generates frequency control data by performing a temperature compensation process by a neural network calculation process based on temperature detection data and an amount of change in time of the temperature detection data, and an oscillation signal generation circuit that generates an oscillation signal of a frequency set by the frequency control data using a resonator.

The present disclosure may include, for example, a tunable capacitor having a decoder for generating a plurality of control signals, and an array of tunable switched capacitors comprising a plurality of fixed capacitors coupled to a plurality of switches. The plurality of switches can be controlled by the plurality of control signals to manage a tunable range of reactance of the array of tunable switched capacitors. Additionally, the array of tunable switched capacitors is adapted to have non-uniform quality (Q) factors. Additional embodiments are disclosed.

An equipment box assembly includes a housing including a back wall, a bottom wall, a top wall, and first and second sidewalls defining a cavity. At least one mounting feature is on each of the first and second sidewalls. The housing is sized to fit between first and second adjacent studs with the first sidewall mounted to the first stud using the at least one mounting feature on the first sidewall and with the second sidewall mounted to the second stud using the at least one mounting feature on the second sidewall.

An equipment box assembly includes a housing including a back wall, a bottom wall, a top wall, and first and second sidewalls defining a cavity. At least one mounting feature is on each of the first and second sidewalls. The housing is sized to fit between first and second adjacent studs with the first sidewall mounted to the first stud using the at least one mounting feature on the first sidewall and with the second sidewall mounted to the second stud using the at least one mounting feature on the second sidewall.

A discrete field coupled capacitor with a cross-connected capacitor-pair, such as for use as a discrete bypass capacitor. The FCC includes a first port with first and second terminals, and a second port with third and fourth terminals. A first capacitor structure is connected between the first and second terminals, and a second capacitor structure connected between the third and fourth terminals. A cross-connect structure includes a first cross-connection to connect the first terminal to the third terminal, and a second cross-connection to connect the second terminal to the fourth terminal, to cross-connect the first and second capacitor structures. The capacitor structures have respective parasitic ESL, and can be disposed in proximity to effect a pre-defined ESL field coupling with reverse phasing to reduce parasitic ESL. The FCC can be constructed as a PCB or monolithic device. In a PCB four-layer construction, the cross-connections can be formed on respective mid-layers.