A semiconductor package includes a substrate including a wiring; a chip stack including a plurality of semiconductor chips stacked on the substrate, wherein each of the plurality of semiconductor chips has upper and lower surfaces, opposite to each other, front and rear surfaces, opposite to each other, left and right surfaces, opposite to each other, and connection pads disposed on the upper surface adjacent to the front surface; bonding wires electrically connecting the connection pads to the wiring of the substrate; a plurality of attachment films disposed on the lower surface of each of the plurality of semiconductor chips; a mold layer covering the chip stack and the bonding wires; and connection bumps disposed below the substrate, and electrically connected to the wiring, wherein at least one of the plurality of attachment films covers the rear surface of at least one semiconductor chip among the plurality of semiconductor chips.