Patent classifications
G06F3/0646
Apparatuses and methods for partitioned parallel data movement
The present disclosure includes apparatuses and methods for partitioned parallel data movement. An example apparatus includes a memory device that includes a plurality of partitions, where each partition of the plurality of partitions includes a subset of a plurality of subarrays of memory cells. The memory device also includes sensing circuitry coupled to the plurality of subarrays, the sensing circuitry including a sense amplifier. A controller for the memory device is configured to direct a first data movement within a first partition of the plurality of partitions in parallel with a second data movement within a second partition of the plurality of partitions.
MEMORY SYSTEM AND OPERATIONS OF THE SAME
Methods, systems, and devices related to a memory system or scheme that includes a first memory device configured for low-energy access operations and a second memory device configured for storing high-density information and operations of the same are described. The memory system may include an array configured for high-density information and may interface with a host via a controller and a cache or another array of a relatively fast memory type. The memory system may support signals communicated according to one or several modulation schemes, including a modulation scheme or schemes that employ two, three, or more voltage levels (e.g., NRZ, PAM4). The memory system may include, e.g., separate channels configured to communicate using different modulation schemes between a host and between memory arrays or memory types within the memory system.
Tracking storage consumption in a storage array
Attributing consumed storage capacity among entities storing data in a storage array includes: identifying a data object stored in the storage array and shared by a plurality of entities, where the data object occupies an amount of storage capacity of the storage array; and attributing to each entity a fractional portion of the amount of storage capacity occupied by the data object.
Adaptive rebuilding of encoded data slices in a storage network
A method for execution by a computing device of a storage network begins by obtaining scoring information for a rebuilding encoded data slices for one or more storage units of a set of storage units of the storage network, where the scoring information includes two or more of a plurality of rebuilding rates, a plurality of input/output rates, a plurality of scores, and a plurality of selection rates. The method continues with determining a rebuilding rate of the plurality of rebuilding rates to utilize for the rebuilding based on the scoring information. The method continues by implementing the rebuilding of the encoded data slices in accordance with the rebuilding rate.
Hybrid hardware-software coherent framework
Examples herein describe an accelerator device that shares the same coherent domain as hardware elements in a host computing device. The embodiments herein describe a mix of hardware and software coherency which reduces the overhead of managing data when large chunks of data are moved from the host into the accelerator device. In one embodiment, an accelerator application executing on the host identifies a data set it wishes to transfer to the accelerator device to be processed. The accelerator application transfers ownership from a home agent in the host to the accelerator device. A slave agent can then take ownership of the data. As a result, any memory operation requests received from a requesting agent in the accelerator device can gain access to the data set in local memory via the slave agent without the slave agent obtaining permission from the home agent in the host.
Memory controller and method of operating the same
A memory controller and a method of operating the same may provide recovery from a Sudden Power-Off (SPO). The memory controller may control a memory device including a plurality of memory blocks, each memory block having a plurality of pages. The memory controller may include a dummy program controller configured to, after an SPO has occurred while a program operation was being performed on a page of the memory device, control a dummy program operation for recovering from the SPO; a parity data controller configured to control resetting and generation of parity data for chipkill decoding based on pages on which the dummy program operation is determined to be performed; and a valid data controller configured to control movement of valid data based on a number of pages on which the dummy program operation is to be performed.
System configuration drift and compliance management
A master profile may be created defining a plurality of values for a plurality of storage system parameters. The master profile may be stored and applied to a plurality of storage systems. In some embodiments, one or more values defined in the master profile may be changed and the resulting plurality of parameter values stored in a new master profile. Current values of storage system parameters may be monitored, for example, determined according to a predefined schedule or in response to user input, and the current values may be compared against the values defined in the master profiles. The results of these comparisons may be recorded as part of compliance information that indicates the extent of compliance of the parameter values of a storage system with the master profile parameter values. The compliance information may be included as part of a compliance report, notification or some other communication.
Address space access control
There is provided an apparatus for receiving a request from a master to access an input address. Coarse grain access circuitry stores and provides a reference to an area of an output address space in dependence on the input address. One or more fine grain access circuits, each store and provide a reference to a sub-area in the area of the output address space in dependence on the input address. The apparatus forwards the request from the coarse grain access circuitry to one of the one fine grain access circuits in dependence on the input address.
Storage-Aware Optimization for Serverless Functions
An illustrative method includes a storage-aware serverless function management system monitoring one or more serverless function instances of one or more serverless functions implemented in a serverless system, the one or more serverless function instances associated with one or more components of a storage system, determining a portion of a component among the one or more components of the storage system based on the monitoring, and requesting the storage system to adjust storage of data associated with the portion of the component.
CONSISTENT GOVERNANCE WITH ASSET CONSTRAINTS ACROSS DATA STORAGE LOCATIONS
One embodiment provides a method, including: receiving, at a central system, a query requesting access to a dataset, wherein the central system communicates with a plurality of data storage locations, each having a governance policy for data stored at the data storage location, wherein different portions of the dataset are stored within different of the plurality of data storage locations; sending a sub-query formulated based upon the query; receiving a governance enforcement actions listing corresponding to the portion of the dataset stored within the corresponding data storage location; generating a meta-policy of enforcement actions for all of the plurality of data storage locations storing portions of the dataset, wherein the meta-policy identifies enforcement actions and an order of the enforcement actions to be applied to the dataset; and providing the meta-policy to each of the plurality of data storage locations.