An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) and a distributed ETIC (DETIC) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority, respectively. The ETIC and the DETIC can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state configured to permit bus contention. In a non-limiting example, a winner for the single-wire bus is a peer device having a highest bus access priority between the ETIC and the DETIC. In this regard, each of the ETIC and the DETIC can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional peer-to-peer (P2P) bus architecture capable of supporting more application and/or deployment scenarios.

Some embodiments include apparatus and methods for using a direct-current to direct-current (DCDC) converter and a control unit coupled to the DCDC converter. The DCDC converter includes a first node to receive an input signal, a second node to couple to a terminal of an inductor, and a third node to couple to an output node. The DCDC converter includes a driver controlled by a signal. The control unit is arranged to generate control information based on a duty cycle of the signal to control the duty cycle range of the signal.

An envelope tracking power supply, which includes a parallel amplifier, switching circuitry, and a parallel switching supply, is disclosed. The envelope tracking power supply provides an envelope power supply signal to a load. The parallel amplifier regulates an envelope power supply voltage of the envelope power supply signal based on a setpoint of the envelope power supply voltage. The switching circuitry at least partially provides the envelope power supply signal via a first inductive element and drives an output current from the parallel amplifier toward zero. The parallel switching supply provides an assist current to further drive the output current from the parallel amplifier toward zero based on an estimate of a current in the first inductive element and an estimate of a current in the load.

A wideband self-envelope tracking power amplifier (PA) can use more than a 40-MHz channel bandwidth and improves the envelope bandwidth limit of a self-envelope tracking PAs by ten times. The PA uses an envelope load network, which is based on a general multi-stage low-pass filter. The envelope load network located between an RF choke inductor and main DC power supply provides a dynamically modulated PA supply voltage without using a dedicated envelope amplifier. An input terminal of the network connects a main PA via an RF choke inductor to an input of low-pass filter. An output terminal is connected to the low-pass filter via an envelope choke inductor and to a direct current (DC) power supply. A DC blocker is connected between the output of the low-pass filter and ground by a termination resistor.

A delay-compensating power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC) configured to generate a time-variant voltage(s) based on a time-variant target voltage(s) for amplifying an analog signal(s) associated with a time-variant power envelope(s). A voltage processing circuit is provided in the power management circuit to determine a temporal offset, which can be positive or negative, between the time-variant power envelope(s) and the time-variant target voltage(s). Accordingly, the voltage processing circuit modifies the time-variant target voltage(s) to substantially reduce the determined temporal offset and thereby realign the time-variant target voltage(s) with the time-variant power envelope(s). By realigning the time variant target voltage(s) with the time-variant power envelope(s), it is possible to align the time-variant voltage(s) with the time-variant power envelope(s) to reduce distortions (e.g., amplitude clipping) during amplification of the analog signal.

Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

A delay-compensating power management integrated circuit (PMIC) is provided. The PMIC includes a target voltage circuit configured to generate a target voltage that is utilized for generating a time-variant voltage to amplify an analog signal. The target voltage is generated based on a time-variant envelope of the analog signal but lags behind the time-variant envelope by a temporal delay(s) due to an inherent processing delay in the target voltage circuit. In this regard, a voltage processing circuit is provided in the target voltage circuit to generate a modified target voltage that is time-adjusted relative to the target voltage to substantially offset the temporal delay(s). By generating the time-variant voltage based on the modified target voltage, the time-variant voltage can be better aligned with the time-variant envelope of the analog signal, thus helping to reduce amplitude distortion when amplifying the analog signal.

Techniques and examples pertaining to variation calibration for envelope tracking on chip are described. Envelope tracking (ET) statistics among multiple wireless-capable mobile devices (e.g., smartphones) may be collected in laboratory. Optimal ET parameters may be determined based on ET statistics. An ET setting file may be generated for ET factory calibration. In production lines, the ET setting file may be loaded into each mobile device for ET factory calibration.

The embodiments described herein include amplifiers configured for use in radio frequency (RF) applications. In accordance with these embodiments, the amplifiers are implemented to generate a shaped envelope signal, and to apply the shaped envelope signal to transistor gate(s) of the amplifier to provide gate bias modulation. So configured, the shaped envelope signal may facilitate high linearity in the amplifier.

The present invention provides an RF power amplifier architecture which with dynamic digital control of the amplification by incorporating digitized RF input and output signal envelope data and environmental temperature sensor(s) readings into an arbitrary control algorithm implemented on a digital processor. Via the combination of digitally controlled DC/DC converter and a D/A converter, the quiescent bias of the power FET of the RF output stage can become a realization of virtually any function of the feedback and input data.