In method for processing a measured-value signal determined in an analog manner and a resolver system for implementing the method, the measured-value signal being supplied to a delta-sigma modulator, which makes a bit stream, particularly a one-bit data stream, available on the output side, in particular, whose moving average corresponds to the measured-value signal, the bit stream being supplied to a first digital filter, which converts the bit stream into a stream of digital intermediate words, that is a multibit data stream, the first digital filter having three serially arranged differentiators, the bit stream being clocked at a clock frequency f.sub.S, that is, at a clock-pulse period T.sub.S=1/f.sub.S, and therefore the stream of digital intermediate words being clocked, and thus updated, at a clock-pulse frequency f.sub.D, that is, at a clock-pulse period T.sub.D=1/f.sub.D, the output signal of the first digital filter being supplied to a second digital filter, the second digital filter having as its output data-word stream the difference between a first and a second result data-word stream, the first and second result data-word stream being determined around a first and second time interval from the intermediate data-word stream, the first and second time interval being situated at a distance in time T1, the first result data-word stream being determined as a time-discrete second derivation with time scale TD and the second result data-word stream being determined as a time-discrete second derivation with time scale TD.

A current digital-to-analog converter (DAC) and an integrated circuit chip including the DAC are disclosed. The current DAC includes a switching circuit that includes a plurality of switches coupled to receive differential digital control signals and to provide first and second differential current outputs, a current source coupled to an upper rail and to a first node of the switching circuit, a first current sink coupled to a lower rail and to a second node of the switching circuit, and an interference cancellation circuit coupled to substantially prevent a tail capacitance current from flowing through the first and second differential current outputs.

Systems and techniques relating to a digital-to-analog converter (DAC) are described. A described DAC cell includes a differential switch pair coupled with a cross-coupled switch pair. Gate terminals of the differential switch pair are arranged to respectively receive an input signal to the cell and an inverted version of the input signal to respectively drive the gate terminals of the differential switch pair. Gate terminals of the cross-coupled switch pair are arranged to respectively receive the input signal and the inverted version of the input signal to respectively drive the gate terminals of the cross-coupled switch pair. The cross-coupled switch pair is configured to reduce or eliminate net differential transient current between switch output terminals of the differential switch pair. A current-to-voltage converter coupled with the switch output terminals of the differential switch pair generates a voltage that forms at least a portion of an output of the digital-to-analog converter.

Systems and methods are provided for digital-to-analog converter (DAC) with partial constant switching. A digital-to-analog converter (DAC) comprising a plurality of conversion elements may be configured to apply constant switching in only some of the conversion elements. Only conversion elements applying constant switching may incorporate circuitry for providing such the constant switching. Alternatively, each conversion element may incorporate constant switching circuitry and functionality, and the constant switching may then be turned on or off for each conversion element adaptively, such as based on input conditions.

Systems and methods are provided for digital-to-analog converter (DAC) with partial constant switching. A digital-to-analog converter (DAC) comprising a plurality of conversion elements may be configured to apply constant switching in only some of the conversion elements. Only conversion elements applying constant switching may incorporate circuitry for providing such the constant switching. Alternatively, each conversion element may incorporate constant switching circuitry and functionality, and the constant switching may then be turned on or off for each conversion element adaptively, such as based on input conditions.

A multiplexer (MUX) calibration system includes main MUX circuitry, first replica MUX circuitry, digital-to-analog (DAC) circuitry, detection circuitry, and control circuitry. The main MUX circuitry receives clock signals and outputs a first data signal based on the clock signals. The first replica MUX circuitry receives the clock signals and outputs a second data signal based on the clock signals. The DAC circuitry generates an offset voltage. The detection circuitry receives the second data signal and the offset voltage and generates a first error signal based on one or more of the second data signal and the offset voltage. The control circuitry receives the first error signal and generates a first control signal indicating an adjustment to the clock signals.

Radio transmitters providing an analog signal with both radio frequency (RF) and baseband frequency information are disclosed herein. In certain embodiments, a transmitter for an RF communication system includes a radio frequency digital-to-analog converter (RFDAC) that outputs the analog signal with two bands of content. In particular, the analog signal includes a first band on content at RF frequency and representing the RF signal for transmission, and a second band of content at baseband frequency and representing baseband information such as the envelope of the RF signal.

Droop caused by a filter may be compensated by applying a pre-filter to the audio signal that cancels out, at least in part, the droop caused by the filter. The pre-filter may implement magnitude compensation that causes an approximately flat passband response when the pre-filtered signal is passed through the filter. The pre-filter may be applied to one-bit wide data streams, such as high-fidelity direct stream digital (DSD) audio data or other one-bit wide data such as pulse-density modulation (PDM) encoded data. The pre-filtering and filtering may be implemented in components of an audio processor, such as in a digital-to-analog converter (DAC). The pre-filtering may include upsampling the one-bit wide data to form symbols and substituting an eighth bit of the symbol with an inverted version of an earlier-received bit.

A nicotine delivery device (200) for generating a mist containing nicotine for inhalation by a user. The device comprises a mist generator device (201) and a driver device (202). The driver device (202) is configured to drive the mist generator device (201) at an optimum frequency to maximise the efficiency of mist generation by the mist generator device (201).

A calibration method for a digital-to-analog converter (DAC) is disclosed. The DAC is applied to a successive approximation analog-to-digital converter (SA ADC) and includes a first capacitor, multiple second capacitors and a bridge capacitor. The method includes the steps of: (a) controlling voltages at two input terminals of a comparator of the SA ADC to be equal; (b) changing a voltage at a first terminal of the first capacitor; (b) obtaining a first output of the SA ADC; (d) after obtaining the first output, controlling voltages at the two input terminals of the comparator to be equal; (e) changing voltages at multiple first terminals of the second capacitors; (f) obtaining a second output of the SA ADC; and (g) calibrating the DAC according to the first output and the second output.