H03M1/66

Method and apparatus for enhancing dynamic range in a digital-to-analog conversion circuit
11569839 · 2023-01-31 · ·

Described herein is a method and apparatus for enhancing the dynamic range of a digital-to-analog conversion circuit. Dynamic range enhancement (DRE) is accomplished by modifying the gain of components of the circuit so that the gain of components generating noise is effectively reduced. In a circuit utilizing a plurality of 1-bit DACs, analog signal gain is decreased when the full nominal gain of the analog portion of the circuit is not needed to obtain a desired peak output amplitude. The reduction is accomplished by effectively “disconnecting” some of the plurality of 1-bit DACs. Some or all of the 1-bit DACs are configured to have a third or “tri-state” in which there is no connection to the normal two reference levels thus providing no output. If some portion of the 1-bit DACs is placed in the tri-state, both the signal and noise gain will be reduced.

Synchronous detection apparatus, synchronous detection method, and program

A synchronization detection device includes: a correction unit configured to correct sampled data of a waveform on which a dither signal is superimposed, for each period of a reference signal in accordance with a period of the dither signal; a multiplication unit configured to multiply the corrected sampled data by a weight coefficient that is different for each level of the reference signal and associated with a timing of the reference signal; and an averaging unit configured to derive, as a detection result, an average of a result of the multiplication of the corrected sampled data by the weight coefficient.

Timing CalibrationTechnique For Radio Frequency Digital-To-Analog Converter
20230231566 · 2023-07-20 ·

A calibration system comprises an actuator circuit comprising a first delay circuit that receives a plurality of data pulses and a second delay circuit that receives the pulses, wherein one of the first and second delay circuits delays the data pulses independently of the other of the first and second delay circuits; a data switch that receives an output of the actuator circuit including delay data signals of the data pulses from the first and second delay circuits and switches and outputs a plurality of local oscillator (LO) signals for output as a controlled LO signal according to control signals of the delay data signals and applied to the data switch. At least one calibration switch receives the output of the actuator circuit and the plurality of LO+ and LO− signals, and outputs a second controlled LO signal output to a sense circuit.

Suppressing spurious signals in direct-digital synthesizers

A technique for generating analog waveforms includes combining a desired, in-band signal with a randomizing, out-of-band signal at an input of a DAC, operating the DAC to generate DAC output based on a combination of the desired signal and the randomizing signal, and filtering the DAC output to pass the desired signal while removing the randomizing signal.

Suppressing spurious signals in direct-digital synthesizers

A technique for generating analog waveforms includes combining a desired, in-band signal with a randomizing, out-of-band signal at an input of a DAC, operating the DAC to generate DAC output based on a combination of the desired signal and the randomizing signal, and filtering the DAC output to pass the desired signal while removing the randomizing signal.

Self calibration by double signal sampling

A current transformer (CT) for the purpose of, for example, current measurement, that uses a power line as a first coil and a second coil for measurement purposes, is further equipped with a third coil. Circuitry connected to the third coil is adapted to measure a signal therefrom. The measured signal from the third coil is compared to a signal measured from the second coil and based on the results, internal CT parameters are determined allowing calibration of actual results to expected results thereby providing an improved accuracy. This is especially desirable when using the CT for measurement of the like of current or phase of the primary coil when measurements are adjusted using the newly determined calibration parameters.

Self calibration by double signal sampling

A current transformer (CT) for the purpose of, for example, current measurement, that uses a power line as a first coil and a second coil for measurement purposes, is further equipped with a third coil. Circuitry connected to the third coil is adapted to measure a signal therefrom. The measured signal from the third coil is compared to a signal measured from the second coil and based on the results, internal CT parameters are determined allowing calibration of actual results to expected results thereby providing an improved accuracy. This is especially desirable when using the CT for measurement of the like of current or phase of the primary coil when measurements are adjusted using the newly determined calibration parameters.

Adaptive switch biasing scheme for digital-to-analog converter (DAC) performance enhancement

Methods and apparatus for adaptively generating a reference voltage (V.sub.REF) for biasing a switch driver and corresponding switch in a digital-to-analog converter (DAC). The adaptive biasing scheme may be capable of tracking process, voltage, and temperature (PVT) of the DAC. An example DAC generally includes a plurality of DAC cells, each DAC cell comprising a current source, a switch coupled in series with the current source, and a switch driver coupled to a control input of the switch, the switch driver being configured to receive power from a first power supply rail referenced to a reference potential node; a regulation circuit comprising a first transistor coupled between the reference potential node for the DAC and the switch driver in at least one of the plurality of DAC cells; and a V.sub.REF generation circuit coupled to the regulation circuit and configured to adaptively generate a V.sub.REF for the regulation circuit.

Sliding window and DC offset correction technique for pulse doppler radar systems

A pulsed radar system is presented that includes a sliding window and DC offset. A method of pulsed DC radar operation, comprising an operation state, the operation state including initializing parameters for a current integration window; providing timing for the current integration window to an integrating filter based from a transmit pulse; providing a DC offset associated with the current integration window; and incrementing the current integration window to the next integration window to be timed from a next transmit pulse.

Sliding window and DC offset correction technique for pulse doppler radar systems

A pulsed radar system is presented that includes a sliding window and DC offset. A method of pulsed DC radar operation, comprising an operation state, the operation state including initializing parameters for a current integration window; providing timing for the current integration window to an integrating filter based from a transmit pulse; providing a DC offset associated with the current integration window; and incrementing the current integration window to the next integration window to be timed from a next transmit pulse.