Systems, devices, computer-implemented methods, and/or computer program products that facilitate low power, wideband multitone generation. In one example, a multitone generator device can comprise a controller operatively coupled to first and second digital-to-analog converters (DACs). The controller can apply different delays of a sampling signal to the first and second DACs to facilitate sideband suppression of signals output by the first and second DACs. One aspect of such a multitone generator device is that the multitone generator device can facilitate low power, wideband multitone generation.

A video display unit includes a display panel with gate drivers and source drivers. Each of the source drivers receives an encoded analog signal representing a video stream over a transmission medium and decodes the signal to produce samples for output to the display. Gate driver control signals synchronize the gate drivers with the source drivers. The source drivers are integrated with the display panel glass in part or in whole. Amplifiers and level shifters of each source driver are implemented on the panel glass and the collector and decoder are not. Or, the amplifiers, shifters and collector are implemented on the panel glass and the decoder is not. Or, the amplifiers, shifters, collector and decoder of each source driver are implemented on the panel glass. The source drivers may drive a display of a mobile device. Thin-film transistors are used to implement the source drivers on glass.

A video display unit includes a display panel with gate drivers and source drivers. Each of the source drivers receives an encoded analog signal representing a video stream over a transmission medium and decodes the signal to produce samples for output to the display. Gate driver control signals synchronize the gate drivers with the source drivers. The source drivers are integrated with the display panel glass in part or in whole. Amplifiers and level shifters of each source driver are implemented on the panel glass and the collector and decoder are not. Or, the amplifiers, shifters and collector are implemented on the panel glass and the decoder is not. Or, the amplifiers, shifters, collector and decoder of each source driver are implemented on the panel glass. The source drivers may drive a display of a mobile device. Thin-film transistors are used to implement the source drivers on glass.

A compensator is described with higher bandwidth than a traditional differential compensator, lower area than traditional differential compensator (e.g., 40% lower area), and lower power than traditional differential compensator. The compensator includes a differential to single-ended circuitry that reduces the number of passive devices used to compensate an input signal. The high bandwidth compensator allows for faster power state and/or voltage transitions. For example, a pre-charge technique is applied to handle faster power state transitions that enables aggressive dynamic voltage and frequency scaling (DVFS) and voltage transitions. The compensator is configurable in that it can operate in voltage mode or current mode.

Systems and methods for improving the efficiency of a rotational dynamic element matching (DEM) for Delta Sigma converters. In some implementations, the systems and methods are provided for reducing intersymbol interference (ISI) of a Delta Sigma converter. A delta sigma converter architecture can include multiple I-DACs, and the output from each I-DAC can vary from the other l-DACs. Techniques include decreasing mismatch among multiple l-DACs while improving efficiency of rotational dynamic element matching.

Systems and methods for improving the efficiency of a rotational dynamic element matching (DEM) for Delta Sigma converters. In some implementations, the systems and methods are provided for reducing intersymbol interference (ISI) of a Delta Sigma converter. A delta sigma converter architecture can include multiple I-DACs, and the output from each I-DAC can vary from the other l-DACs. Techniques include decreasing mismatch among multiple l-DACs while improving efficiency of rotational dynamic element matching.

One or more systems, devices and/or methods of use provided herein relate to a device that can support a signal generation. A current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. Analog inputs and outputs of the DAC and upconverting mixer can be represented as currents, and the DAC can generate a baseband signal. The DAC and upconverting mixer each can comprise switching transistors of the same type, such as p-type metal-oxide semiconductor (PMOS) switching transistors. In one or more embodiments, a current source and a diode-connected transistor can be arranged in parallel in the current-mode signal path, and the current source passes a static current, while the diode-connected transistor passes both a static current and a dynamic current.

One or more systems, devices and/or methods of use provided herein relate to a device that can support a signal generation. A current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. Analog inputs and outputs of the DAC and upconverting mixer can be represented as currents, and the DAC can generate a baseband signal. The DAC and upconverting mixer each can comprise switching transistors of the same type, such as p-type metal-oxide semiconductor (PMOS) switching transistors. In one or more embodiments, a current source and a diode-connected transistor can be arranged in parallel in the current-mode signal path, and the current source passes a static current, while the diode-connected transistor passes both a static current and a dynamic current.

Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.

A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit. A Current Digital to Analog Converter (IDAC) scales the output of the VWT and provides the scaled output to an amplifier bias input.