A data sensing circuit including a reference signal circuit, a reference signal combining circuit, drive-sense circuits, an array of sensors, sets of digital filters, and a processing module. The processing module provides a reference control signal to the reference signal circuit operable to generate a plurality of reference signals based on the reference control signal. The reference signal combining circuit transmits sets of reference signals to the drive-sense circuits operably coupled to an array of sensor. When the sensor is exposed to a condition, and is receiving the signal from the drive-sense circuits, an electrical characteristic of the sensor affects the signal, which is interpreted by the drive-sense circuit and converted to a digital signal to be filtered by the set of digital filters generating a frequency response for the array of sensors.

A data sensing circuit including a reference signal circuit, a reference signal combining circuit, drive-sense circuits, an array of sensors, sets of digital filters, and a processing module. The processing module provides a reference control signal to the reference signal circuit operable to generate a plurality of reference signals based on the reference control signal. The reference signal combining circuit transmits sets of reference signals to the drive-sense circuits operably coupled to an array of sensor. When the sensor is exposed to a condition, and is receiving the signal from the drive-sense circuits, an electrical characteristic of the sensor affects the signal, which is interpreted by the drive-sense circuit and converted to a digital signal to be filtered by the set of digital filters generating a frequency response for the array of sensors.

Certain aspects of the present disclosure generally relate to circuitry and techniques for digital-to-analog conversion. One example device for digital-to-analog conversion generally includes: a digital-to-analog converter (DAC) having an input coupled to an input node of the device; a first return-to-zero (RZ) DAC having an input coupled to an input node of the device; and a combiner, wherein an output of the first DAC is coupled to a first input of the combiner, and wherein an output of the first RZ DAC is coupled to a second input of the combiner.

Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.

There is described an analog-to-digital converter, ADC, device (100), comprising: i) a first converter stage (110), comprising a first digital-to-analog converter, DAC, (115), comprising at least two first unit elements (116, 117, 118) each with a first unit element value (U11, U12, U13); ii) a second converter stage (120), comprising a second DAC (125), comprising at least two second unit elements each with a second unit element value (U21, U22, U23); and iii) a control device (180), coupled to the first DAC (115) and the second DAC and configured to: swap at least one of the first unit element values (U1) with at least one of the second unit element values (U2) to obtain corresponding third unit element values (U3) and forth unit element values (U4).

A digital-to-analog converter (DAC) for converting a digital input word to an analog output signal includes a string DAC, a first interpolator and a second interpolator. The string DAC outputs a first voltage and a second voltage in response to M most significant bits of the digital input word. The first interpolator interpolates between the first and second voltages in response to middle Q least significant bits of the digital input word and provides a first interpolated voltage. The second interpolator interpolates between the first interpolated voltage and the second voltage in response to lower P least significant bits of the digital input word.

A digital-to-analog converter includes a plurality of 1-bit elements each of which outputs a current corresponding to a value indicated by a digital signal when the digital signal is input; and a capacitive load connected to the plurality of 1-bit elements, the digital-to-analog converter being configured to generate an analog voltage waveform via the capacitive load that receives currents output from the plurality of 1-bit elements, wherein each of the 1-bit elements includes a switching circuit to change a bias of a voltage in each of the 1-bit elements according to a value indicated by an input digital signal, and to switch connection and non-connection with a power supply according to a change in the bias.

A digital-to-analog converter includes a plurality of 1-bit elements each of which outputs a current corresponding to a value indicated by a digital signal when the digital signal is input; and a capacitive load connected to the plurality of 1-bit elements, the digital-to-analog converter being configured to generate an analog voltage waveform via the capacitive load that receives currents output from the plurality of 1-bit elements, wherein each of the 1-bit elements includes a switching circuit to change a bias of a voltage in each of the 1-bit elements according to a value indicated by an input digital signal, and to switch connection and non-connection with a power supply according to a change in the bias.

In accordance with an embodiment, a method for digital-to-analog conversion includes: mapping a uniformly distributed input code to a non-uniformly distributed input code of a switched capacitor digital-to-analog converter (DAC), the non-uniformly distributed input code including a most significant code (MSC) and a least significant code (LSC); transferring a first charge from a set of DAC capacitors to a charge accumulator based on the MSC; forming a second charge based on the LSC; and transferring the second charge from the set of DAC capacitors to the charge accumulator, where each capacitor of the set of DAC capacitors is used for each value of the non-uniformly distributed input code, each capacitor of the set of DAC capacitors provides a same corresponding nominal charge within each value of the non-uniformly distributed input code, and where the same nominal charge is proportional to a value of the non-uniformly distributed input code.

In accordance with an embodiment, a method for digital-to-analog conversion includes: mapping a uniformly distributed input code to a non-uniformly distributed input code of a switched capacitor digital-to-analog converter (DAC), the non-uniformly distributed input code including a most significant code (MSC) and a least significant code (LSC); transferring a first charge from a set of DAC capacitors to a charge accumulator based on the MSC; forming a second charge based on the LSC; and transferring the second charge from the set of DAC capacitors to the charge accumulator, where each capacitor of the set of DAC capacitors is used for each value of the non-uniformly distributed input code, each capacitor of the set of DAC capacitors provides a same corresponding nominal charge within each value of the non-uniformly distributed input code, and where the same nominal charge is proportional to a value of the non-uniformly distributed input code.