H01L23/4824

Semiconductor device having a porous metal layer and an electronic device having the same
10515910 · 2019-12-24 · ·

According to various embodiments, a semiconductor device may include: a contact pad; a metal clip disposed over the contact pad; and a porous metal layer disposed between the metal clip and the contact pad, the porous metal layer connecting the metal clip and the contact pad with each other.

SEMICONDUCTOR DEVICE
20190386128 · 2019-12-19 ·

A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.

TSV AS PAD

Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.

OFFSET PADS OVER TSV
20190385982 · 2019-12-19 ·

Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad may be disposed at a bonding surface of at least one of the microelectronic substrates, where the contact pad is positioned offset relative to a TSV in the substrate and electrically coupled to the TSV.

Semiconductor device

A semiconductor device includes: a high-side transistor having a first gate electrode, first drain electrodes and first source electrodes; a low-side transistor having a second gate electrode, second drain electrodes and second source electrodes; a plurality of first drain pads that are disposed above the first drain electrodes and are electrically connected to the first drain electrodes; a plurality of first source pads that are disposed above the second source electrodes and are electrically connected to the second source electrodes; a plurality of first common interconnects that are disposed above the first source electrodes and above the second drain electrodes and are electrically connected to the first source electrodes and the second drain electrodes; and a plurality of second common interconnects that are connected to the first common interconnects, and extend in a direction that intersects with the first common interconnects.

Power amplifier

A multifinger transistor in which source fingers (201 to 206) and drain fingers (301 to 305) are arranged alternately with each of gate fingers (101 to 110) being sandwiched between one of the source fingers and one of the drain fingers is used. Line (10) and line (20) are attached to the source fingers (201 to 206) in an area on a gate side and causing a phase rotation such that the nearer to a central part a gate finger is, the more inductive the gate finger is.

FIELD EFFECT TRANSISTOR WITH INTEGRATED SERIES CAPACITANCE
20240105712 · 2024-03-28 ·

A radio frequency (RF) transistor die includes a semiconductor structure having an active region including a plurality of transistors having respective gate, drain, or source fingers, and manifold on the semiconductor structure that electrically couples a plurality of the respective gate, drain, or source fingers. At least one capacitor is on the manifold and/or is on at least one of the respective gate, drain, or source fingers. The manifold may be a first metal layer on the semiconductor structure that provides a lower plate of the at least one capacitor, and a second metal layer on the semiconductor structure may provide an upper plate of the at least one capacitor. Related devices and fabrication methods are also discussed.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING
20240105640 · 2024-03-28 ·

A semiconductor device includes a first conductive layer, a semiconductor layer, first to second control electrodes, and first to second electrode pads. The first conductive layer includes first to second conductive regions. The second conductive region is thinner than the first conductive region. The semiconductor layer is located on the first conductive layer, and includes first to fifth semiconductor regions. The first control electrode faces the first, second, and third semiconductor regions via a first insulating film. The second control electrode faces the first, fourth, and fifth semiconductor regions via a second insulating film. The first electrode pad is located above the semiconductor layer and electrically connected with the third semiconductor region. The second electrode pad is located above the semiconductor layer and electrically connected with the fifth semiconductor region. At least a portion of the first conductive region is positioned below the first and second electrode pads.

Semiconductor device including sense insulated-gate bipolar transistor
11942531 · 2024-03-26 · ·

A semiconductor device of the present invention includes a semiconductor layer including a main IGBT cell and a sense IGBT cell connected in parallel to each other, a first resistance portion having a first resistance value formed using a gate wiring portion of the sense IGBT cell and a second resistance portion having a second resistance value higher than the first resistance value, a gate wiring electrically connected through mutually different channels to the first resistance portion and the second resistance portion, a first diode provided between the gate wiring and the first resistance portion, a second diode provided between the gate wiring and the second resistance portion in a manner oriented reversely to the first diode, an emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the main IGBT cell, and a sense emitter electrode disposed on the semiconductor layer, electrically connected to an emitter of the sense IGBT cell.

NITRIDE-BASED SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME
20240096726 · 2024-03-21 ·

A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first nitride-based transistor, a second nitride-based transistor, and a thermal resistor. The first nitride-based transistor is disposed over the second nitride-based semiconductor layer and applies the 2DEG region as an own channel. The second nitride-based transistor is disposed over the second nitride-based semiconductor layer and applying the 2DEG region as an own channel. The temperature sensor is disposed over the second nitride-based semiconductor layer and between first and second nitride-based transistors. The temperature sensor is in a strip shape and at least turns twice in a region between first and second nitride-based transistors.