A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.

Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a metal pad may be disposed at a bonding surface of at least one of the microelectronic substrates, where the contact pad is positioned offset relative to a TSV in the substrate and electrically coupled to the TSV.

A semiconductor device includes: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; finger-shaped source electrodes on the second nitride semiconductor layer; finger-shaped drain electrodes disposed so as to be spaced apart from the source electrodes; and finger-shaped gate electrodes respectively disposed between the source electrodes and the drain electrodes. The gate electrodes are electrically connected, via a first gate integrated wiring, a plurality of second gate integrated wirings and a third gate integrated wiring, to gate pads located on one or both ends of the third gate integrated wiring. A plurality of source pads and the plurality of second gate integrated wirings are formed alternately in a first direction perpendicular to the longitudinal direction of the gate electrodes.

A semiconductor module includes a laminated substrate including an insulating board and a plurality of circuit boards that are arranged on an upper face of the insulating board, the plurality of circuit boards including first and second circuit boards, a semiconductor element disposed on the first circuit board and including, on an upper face of the semiconductor element, a main electrode, a gate pad, and a gate runner electrically connected to the gate pad, and a first wiring member electrically connecting the main electrode to the second circuit board. The gate runner extends so as to divide the main electrode into a plurality of electrodes including a first main electrode at a first side and a second main electrode at a second side, and the first wiring member is arranged to cross over the gate runner.

Implementations of a semiconductor package may include two or more die, each of the two more die coupled to a metal layer at a drain of each of the two more die, the two or more die and each metal layer arranged in two parallel planes; a first interconnect layer coupled at a source of each of the two more die; a second interconnect layer coupled to a gate of each of the two or more die and to a gate package contact through one or more vias; and an encapsulant that encapsulates the two or more die and at least a portion of the first interconnect layer, each metal layer, and the second interconnect layer.

A semiconductor device includes a semiconductor substrate, a first semiconductor layer on the semiconductor substrate, a second semiconductor layer on the first semiconductor layer, a first electrode on the second semiconductor layer, a second electrode arranged with the first electrode along a front surface of the second semiconductor layer, a third electrode between the first and second electrodes on the second semiconductor layer, a metal layer on a back surface of the semiconductor substrate at a side opposite to the first semiconductor layer, and a conductor extending inside the semiconductor substrate and electrically connecting the first electrode and the metal layer via the second semiconductor layer. The second semiconductor layer includes a first region including a first-conductivity-type impurity, and a second region including a first-conductivity-type impurity with a higher concentration than the first region; and the second region is between the conductor and the first electrode.

Power semiconductor devices comprise a gate pad, a gate bus, and a gate resistor that is electrically interposed between the gate pad and the gate bus and comprises a wide band-gap semiconductor material region.

Semiconductor devices comprise a semiconductor layer structure having an active region therein, a gate pad on the semiconductor layer structure and positioned to be closest to a first side of the active region, a plurality of gate electrodes, and a metal gate runner that electrically connects the gate pad to at least some of the gate electrodes. The metal gate runner comprises an outer runner that extends around a portion of a periphery of the active region. The outer gate runner comprises a first outer segment that extends along at least a portion of the first side of the active region and a second outer segment that extends along at least a portion of a second side of the active region that connects to the first side, but the outer gate runner does not extend along a third side of the active region that is opposite the second side.

A high-frequency amplifier includes: a common-source transistor that has gate fingers, drain fingers, and source fingers, amplifies a signal applied to each of the gate fingers as a signal to be amplified, and outputs an amplified signal from each of the drain fingers; a common-gate transistor that has source fingers connected to the drain fingers of the common-source transistor, drain fingers, and gate fingers, and amplifies the amplified signal output from each of the drain fingers of the common-source transistor; a gate bus bar connected to the gate fingers of the common-gate transistor; and capacitors each having a first end connected to the gate bus bar and a second end grounded: wherein the capacitors are arranged at respective positions where impedances obtained by looking toward the respective capacitors from the respective gate fingers of the common-gate transistor are equal to each other.

A semiconductor device includes an insulating layer, a semiconductor layer on the insulating layer, and a control electrode on the semiconductor layer. The semiconductor layer includes first and second semiconductor parts and a separation trench between the first and second semiconductor parts. The first and second semiconductor parts extending along the insulating film. The first semiconductor part includes first and second regions of a first conductivity type, and a fifth region of a second conductivity type between the first and second regions. The second semiconductor part includes third and fourth regions of the second conductivity type, and a sixth region of the second conductivity type between the third and fourth regions. The control electrode extends over the fifth and sixth regions. The semiconductor layer further including a seventh region of the second conductivity type at a bottom of the separation trench and electrically connecting the fifth and sixth regions.