A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.

In some embodiments, radio-frequency amplifiers can include a plurality of narrow band power amplifiers implemented. Each narrow band power amplifier can be configured to operate with a high voltage in an average power tracking mode and be capable of being coupled to an output filter associated with a respective individual frequency band. Each narrow band power amplifier can be sized smaller than a wide band power amplifier configured to operate with more than one of the frequency bands associated with the plurality of narrow band power amplifiers.

In some embodiments, radio-frequency amplifiers can include a plurality of narrow band power amplifiers implemented. Each narrow band power amplifier can be configured to operate with a high voltage in an average power tracking mode and be capable of being coupled to an output filter associated with a respective individual frequency band. Each narrow band power amplifier can be sized smaller than a wide band power amplifier configured to operate with more than one of the frequency bands associated with the plurality of narrow band power amplifiers.

A power amplifier circuit includes a power amplifier, first and second filters, and first and second output paths. The power amplifier is able to amplify both of a first signal and a second signal. The frequency of the second signal is higher than that of the first signal. The first filter includes a first inductor and attenuates the second signal amplified in the power amplifier. The first inductor serves as a path for the first signal amplified in the power amplifier. The second filter includes a first capacitor and attenuates the first signal amplified in the power amplifier. The first capacitor serves as a path for the second signal amplified in the power amplifier. The first signal outputted from the first filter is supplied to the first output path. The second signal outputted from the second filter is supplied to the second output path.

A current control circuit controls a base current of a first transistor included in a bias circuit outputting a bias current to a power amplifier based on a base-collector voltage of the first transistor. The current control circuit includes a first circuit that outputs a signal associated with the base-collector voltage of the first transistor, and a second circuit that, based on the signal, provides electrical continuity between a base of the first transistor and a reference potential.

The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

In one embodiment, an impedance matching network includes a variable reactance circuit providing a variable capacitance or inductance. The variable reactance circuit includes reactance components and corresponding switching circuits. Each of the switching circuits includes a diode and a driver circuit to switch the diode. The driver circuit includes first and second switches coupled in series. A first driver is coupled to the first switch, a second driver is coupled to the second switch, and a third driver is coupled to the first and second drivers. The third driver provides a first signal to the first driver, and a second signal to the second driver. In providing the signals, the third driver increases and decreases a duration of a dead time between (a) driving the first driver on and the second driver off, or (b) driving the second driver on and the first driver off.

In one embodiment, an impedance matching network includes a variable reactance circuit providing a variable capacitance or inductance. The variable reactance circuit includes reactance components and corresponding switching circuits. Each of the switching circuits includes a diode and a driver circuit to switch the diode. The driver circuit includes first and second switches coupled in series. A first driver is coupled to the first switch, a second driver is coupled to the second switch, and a third driver is coupled to the first and second drivers. The third driver provides a first signal to the first driver, and a second signal to the second driver. In providing the signals, the third driver increases and decreases a duration of a dead time between (a) driving the first driver on and the second driver off, or (b) driving the second driver on and the first driver off.

A carrier aggregation method can include amplifying a first signal with a first current converter to generate a current representative of the amplified first signal, and amplifying a second signal with a second current converter to generate a current representative of the amplified second signal. The method can further include processing the amplified first signal and the amplified second signal with an adder circuit, with the first current converter and the adder circuit forming a first cascode amplifier, and the second current converter and the adder circuit forming a second cascode amplifier. The method can further include providing an output signal at a common output node that is coupled to an output of each of the first and second cascode amplifiers.