A power amplification system includes a Doherty power amplifier (PA) configured to receive a voltage supply signal and a radio-frequency (RF) signal and generate an amplified RF signal using the voltage supply signal, the Doherty PA including a carrier amplifier and a peaking amplifier. A carrier amplifier bias circuit and a peaking amplifier bias circuit coupled to one or more of the carrier amplifier and the carrier amplifier bias circuit over a coupling path are provided wherein the peaking amplifier bias circuit is configured to provide a peaking bias signal to the peaking amplifier based on a saturation level of the carrier amplifier.

A power amplification system includes a Doherty power amplifier (PA) configured to receive a voltage supply signal and a radio-frequency (RF) signal and generate an amplified RF signal using the voltage supply signal, the Doherty PA including a carrier amplifier and a peaking amplifier. A carrier amplifier bias circuit and a peaking amplifier bias circuit coupled to one or more of the carrier amplifier and the carrier amplifier bias circuit over a coupling path are provided wherein the peaking amplifier bias circuit is configured to provide a peaking bias signal to the peaking amplifier based on a saturation level of the carrier amplifier.

The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a variable gain amplifier that includes a first transistor and a second transistor whose gate terminals are coupled to a first input terminal. A first drain terminal of the first transistor and a first source terminal of the second transistor is coupled to a voltage gain control switch. There are other embodiments as well.

An amplification circuit includes a first switching circuit that includes input terminals and first and second output terminals and that puts the second output terminal into an open state with respect to the input terminals while selectively putting the first output terminal into a state of being connected to any of the input terminals or selectively puts the second output terminal into a state of being connected to any of input terminals while putting the first output terminal into a state of being open with respect to the input terminals; a matching network that is connected to the first output terminal; an amplifier that is connected to an output side of the matching network; a second switching circuit that is connected to an output side of the amplifier; and a bypass path that electrically connects the second output terminal and an output terminal of the second switching circuit. The amplifier is a variable-gain amplifier.

A multi-frequency tunable low-noise amplifier and a multi-frequency tuning implementation method therefor. The amplifier comprises: a system controller (13) and a micro-electro-mechanical system (MEMS) matching tuner (12) connected to the system controller (13). The system controller (13) is configured to respond to a first operation executed by a user via a user interface (15) when in a first mode, to acquire a first matching value produced on the basis of the first operation, and to output the first matching value to the MEMS matching tuner (12). The MEMS matching tuner (12) is configured to be controlled by the system controller (13) and to support the amplifier working on different frequency bands in tuning processing, thus allowing the matching value of the MEMS matching tuner (12) itself to match a current working frequency band.

A multi-frequency tunable low-noise amplifier and a multi-frequency tuning implementation method therefor. The amplifier comprises: a system controller (13) and a micro-electro-mechanical system (MEMS) matching tuner (12) connected to the system controller (13). The system controller (13) is configured to respond to a first operation executed by a user via a user interface (15) when in a first mode, to acquire a first matching value produced on the basis of the first operation, and to output the first matching value to the MEMS matching tuner (12). The MEMS matching tuner (12) is configured to be controlled by the system controller (13) and to support the amplifier working on different frequency bands in tuning processing, thus allowing the matching value of the MEMS matching tuner (12) itself to match a current working frequency band.

A radio frequency (RF) device may include an RF signal source having a selectable frequency, an RF antenna, and an RF power amplifier module coupled between the RF signal source and the RF antenna. The RF power amplifier module may include at least one input tunable cavity impedance matching device, at least one output tunable cavity impedance matching device, and a power amplifier device connected therebetween. A controller may select the selectable frequency of the RF signal source, tune the at least one input tunable cavity impedance matching device based upon the selected frequency, and tune the at least one output tunable cavity impedance matching device based upon the selected frequency.

A high frequency amplifier includes a high frequency amplifier transistor integrated in a first die of a first semiconductor technology and a matching circuit. The high frequency amplifier transistor has an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The matching circuit includes at least a first inductive bondwire, a second inductive bondwire and a capacitive element arranged in series with said inductive bondwires. The capacitive element is integrated in a second die of a second semiconductor technology different from the first semiconductor technology. The second semiconductor technology includes an isolating substrate for conductively isolating the capacitive element from a support attached at a first side to the second die. The capacitive element includes a first plate electrically coupled to a first bondpad of the second die and a second plate electrically coupled to a second bondpad of the second die.

A power amplifier circuit includes a first transistor, a capacitor, and a second transistor. The first transistor has an emitter electrically connected to a reference potential, a base, and a collector electrically connected to a first power supply potential. A first end of the capacitor is electrically connected to the collector of the first transistor. The second transistor has an emitter electrically connected to a second end of the capacitor and electrically connected to the reference potential, a base, and a collector electrically connected to the first power supply potential. An RF output signal obtained by amplifying the RF input signal is output from the collector of the second transistor. A second bias circuit includes a third transistor having a collector electrically connected to a second power supply potential, a base, and an emitter from which the second bias current or voltage is output.

In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.