A method for making a device. The method comprises forming a buffer layer on a substrate; forming a periodically doped layer on the buffer layer; forming one or more wires on the periodically doped layer, the wires being chosen from nanowires and microwires; and introducing porosity into the periodically doped layer to form a porous distributed Bragg reflector (DBR). Various devices that can be made by the method are also disclosed.

A quantum device includes a substrate including a first material and including an upper surface thereof, a first layer comprising a compound of the first material disposed on the upper surface of the substrate, a second layer, comprising a metal oxide, disposed on the first layer, a third layer, comprising a noble metal, disposed on the second layer, a fourth layer, comprising a metal oxide, disposed on the third layer, a fifth layer, comprising a piezoelectric material, disposed on the fourth layer, a sixth layer, comprising a noble metal, disposed on the fifth layer, a seventh layer, comprising a material capable of quantum emission, disposed on the sixth layer, and an eighth layer, comprising a noble metal, disposed on the seventh layer, and at least one of the eighth layer and the seventh layer are sized to enable quantum emission from the seventh layer.

An epitaxial wafer of a light-emitting chip, a method for manufacturing an epitaxial wafer, and a light-emitting chip are provided. A light-emitting layer (5) of an active region of the epitaxial wafer of the light-emitting chip includes at least one superlattice (51), and each superlattice includes: a quantum well sub-layer (511) and a stress conversion sub-layer (512) which is formed on the quantum well sub-layer (511) and enables the quantum well sub-layer (511) to be converted from compressive strain to tensile strain, and the stress conversion sub-layer (512) and the quantum well sub-layer (511) form a two-dimensional electron gas.

A semiconductor light emitting element includes a transparent substrate and a plurality of light emitting diode (LED) chips. The transparent substrate has a support surface and a second main surface disposed opposite to each other. At least some of the LED structures are disposed on the support surface and form a first main surface where light emitted from with a part of the support surface without the LED structures. Each of the LED structures includes a first electrode and a second electrode. Light emitted from at least one of the LED structures passes through the transparent substrate and emerges from the second main surface. An illumination device includes the semiconductor light emitting element and a supporting base. The semiconductor light emitting element is disposed on the supporting base, and an angle is formed between the semiconductor light emitting element and the supporting base.

The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.

A light-emitting diode includes a material structure of barrier in the light-emitting well region to improve restriction capacity of electron holes, improving light-emitting efficiency of the LED chip under high temperature. The LED structure includes a Type I semiconductor layer, a Type II semiconductor layer and an active layer between the both, wherein, the active layer is a multi-quantum well structure alternatively composed of well layers and barrier layers, in which, the first barrier layer is a first AlGaN gradient layer in which aluminum components gradually increase in the direction from the Type I semiconductor layer to the quantum well, and the barrier layer at the middle of well layers is an AlGaN/GaN/AlGaN multi-layer barrier layer, and the last barrier layer is a second AlGaN gradient layer in which aluminum components gradually decrease in the direction from the quantum well to the Type II semiconductor layer.

A nitride semiconductor template includes a heterogeneous substrate, a first nitride semiconductor layer that is formed on one surface of the heterogeneous substrate, includes a nitride semiconductor and has an in-plane thickness variation of not more than 4.0%, and a second nitride semiconductor layer that is formed on an annular region including an outer periphery of an other surface of the heterogeneous substrate, includes the nitride semiconductor and has a thickness of not less than 1 μm.

A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.

The present invention relates to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same and, more specifically, to an electrode assembly comprising nano-scale-LED elements and a method for manufacturing the same, in which the number of nano-scale-LED elements included in a unit area of the electrode assembly is increased, the light extraction efficiency of individual nano-scale-LED elements is increased so as to maximize light intensity per unit area, and at the same time, nano-scale-LED elements on a nanoscale are connected to an electrode without a fault such as an electrical short circuit.