Patent classifications
H01L2224/8391
Power semiconductor module and method for manufacturing the same
A power semiconductor module includes: a substrate including first, second, and third metal patterns separated from each other, a semiconductor element located on the substrate, a lead frame located on the substrate and including first, second, third, and fourth bodies; a first terminal connected to the first body, a second terminal connected to the second body, and a third common terminal that connects the third body and the fourth body, wherein a length of the third common terminal is longer than that of the first and second terminals.
METHOD FOR FABRICATING STACK DIE PACKAGE
In one embodiment, a method can include coupling a gate and a source of a first die to a lead frame. The first die can include the gate and the source that are located on a first surface of the first die and a drain that is located on a second surface of the first die that is opposite the first surface. In addition, the method can include coupling a source of a second die to the drain of the first die. The second die can include a gate and the source that are located on a first surface of the second die and a drain that is located on a second surface of the second die that is opposite the first surface.
Reflow film, solder bump formation method, solder joint formation method, and semiconductor device
The present invention relates to a reflow film containing a thermoplastic resin which is dissolvable in a solvent, and solder particles, wherein the solder particles are dispersed in the film, and also relates to a solder bump formation method which comprises: (A) a step of mounting the reflow film on the electrode surface side of a substrate, (B) a step of mounting and fixing a flat plate, (C) a step of heating, and (D) a step of dissolving and removing the reflow film, and herewith, a reflow film is provided which, by causing localization of the solder component on the electrodes of the substrate by self-assembly, exhibits excellent storage properties, transportability and handling properties during use, and can form solder bumps or solder joints selectively on only the electrodes.
Method for fabricating stack die package
In one embodiment, a method can include coupling a gate and a source of a first die to a lead frame. The first die can include the gate and the source that are located on a first surface of the first die and a drain that is located on a second surface of the first die that is opposite the first surface. In addition, the method can include coupling a source of a second die to the drain of the first die. The second die can include a gate and a drain that are located on a first surface of the second die and the source that is located on a second surface of the second die that is opposite the first surface.