Patent classifications
H01L2224/48463
SEMICONDUCTOR DEVICE COMPRISING PN JUNCTION DIODE AND SCHOTTKY BARRIER DIODE
A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.
Lighting-emitting device filament
A light emitting device filament includes a substrate, a plurality of light emitting diodes, two electrode pads, and a plurality of connection lines. The substrate includes a first surface and a second surface opposite to the first surface. The substrate extending in a first direction and having a width in a second direction. The plurality of light emitting diodes is disposed on the first surface of the substrate. The two electrode pads are disposed on the substrate. The plurality of connection lines electrically connects the plurality of light emitting diodes and the two electrode pads. The plurality of connection lines includes a first connection line and a second connection line. The first connection line, the second connection line, or both are formed in a direction inclined or curved with respect to the first direction or the second direction.
Molded semiconductor package with high voltage isolation
A molded semiconductor package includes: a semiconductor die attached to a substrate, the semiconductor die having a bond pad at a first side of the semiconductor die which faces away from the substrate and an insulating layer covering the first side; an electrical conductor attached to a part of the bond pad exposed by an opening in the insulating layer; a mold compound encasing the semiconductor die; and an electrically insulative material filling the opening in the insulating layer and sealing the part of the bond pad exposed by the opening in the insulating layer. The electrically insulative material separates the mold compound from the part of the bond pad exposed by the opening in the insulating layer. A corresponding method of producing the molded semiconductor package also is described.
Semiconductor package and method of forming a semiconductor package
A semiconductor package is provided. The semiconductor package may include at least one semiconductor chip including a contact pad configured to conduct a current, a conductor element, wherein the conductor element is arranged laterally overlapping the contact pad and with a distance to the contact pad, at least one electrically conductive spacer, a first adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the contact pad, and a second adhesive system configured to electrically and mechanically connect the at least one electrically conductive spacer with the conductor element, wherein the conductor element is electrically conductively connected to a clip or is at least part of a clip, and wherein the spacer is configured to electrically conductively connect the contact pad with the laterally overlapping portion of the conductor element.
INTEGRATED CIRCUIT (IC) AND ELECTRONIC APPARATUS
An integrated circuit (IC) is provided. The IC includes a molding compound, a plurality of pins, an exposed pad, a die surrounded by the molding compound, an adhesive material, and a plurality of bonding wires. The pins are disposed on at least one edge of the molding compound and separated from each other. The adhesive material is disposed between the die and the exposed pad and surrounded by the molding compound. The exposed pad is electrically connected to the die through one of the bonding wires, and the pins are electrically connected to the die through the remaining bonding wires. The die is configured to detect whether a chassis intrusion event is present in response to a signal from the exposed pad.
SOLID-STATE IMAGING APPARATUS, MANUFACTURING METHOD OF THE SAME, AND ELECTRONIC DEVICE
The present disclosure relates to a solid-state imaging apparatus, a manufacturing method of the same and an electronic device which can make an apparatus size further smaller. A solid-state imaging apparatus includes: a laminate of a first structure in which a pixel array unit in which pixels that perform photoelectric conversion are two-dimensionally arranged is formed and a second structure in which an output circuit unit configured to output pixel signals output from the pixels to an outside of an apparatus is formed. The output circuit unit, a first through hole via which penetrates through a semiconductor substrate constituting part of the second structure, and an external terminal for signal output connected to the outside of the apparatus are disposed below the pixel array unit of the first structure. The present disclosure can be applied, for example, to a solid-state imaging apparatus or the like.
Photoelectric conversion device, image pickup system and method of manufacturing photoelectric conversion device
A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
Semiconductor Image Sensor Device Having Back Side Illuminated Image Sensors with Embedded Color Filters
Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
Semiconductor Device and Method of Stacking Semiconductor Die for System-Level ESD Protection
A semiconductor device has a first semiconductor die including a first protection circuit. A second semiconductor die including a second protection circuit is disposed over the first semiconductor die. A portion of the first semiconductor die and second semiconductor die is removed to reduce die thickness. An interconnect structure is formed to commonly connect the first protection circuit and second protection circuit. A transient condition incident to the interconnect structure is collectively discharged through the first protection circuit and second protection circuit. Any number of semiconductor die with protection circuits can be stacked and interconnected via the interconnect structure to increase the ESD current discharge capability. The die stacking can be achieved by disposing a first semiconductor wafer over a second semiconductor wafer and then singulating the wafers. Alternatively, die-to-wafer or die-to-die assembly is used.
Solid-state imaging apparatus, manufacturing method of the same, and electronic device
The present disclosure relates to a solid-state imaging apparatus, a manufacturing method of the same and an electronic device which can make an apparatus size further smaller. A solid-state imaging apparatus includes: a laminate of a first structure in which a pixel array unit in which pixels that perform photoelectric conversion are two-dimensionally arranged is formed and a second structure in which an output circuit unit configured to output pixel signals output from the pixels to an outside of an apparatus is formed. The output circuit unit, a first through hole via which penetrates through a semiconductor substrate constituting part of the second structure, and an external terminal for signal output connected to the outside of the apparatus are disposed below the pixel array unit of the first structure. The present disclosure can be applied, for example, to a solid-state imaging apparatus or the like.