H01L2224/48463

WIRE BONDED SEMICONDUCTOR DEVICE PACKAGE
20240258215 · 2024-08-01 ·

An example apparatus includes: a metal leadframe including a die pad in a central portion and leads spaced from the die pad. The leads include: an interior end spaced from the die pad and having a full thickness of the metal leadframe; a central portion connected to the interior end and extending away from the die pad having a partial thickness less than the full thickness; and an exterior end having the full thickness extending from the central portion. A semiconductor die is mounted to the die pad by die attach material. Wire bonds couple bond pads of the semiconductor die to the interior ends of the leads. Mold compound covers the semiconductor die, the die pad, the wire bonds, the interior ends of the leads, the central portion of the leads, and portions of the exterior ends of the leads to form a semiconductor device package.

SPUTTERING SYSTEM AND METHOD FOR FORMING A METAL LAYER ON A SEMICONDUCTOR DEVICE

A method for sputtering an aluminum layer on a surface of a semiconductor device is presented. The method includes three sputtering steps for depositing the aluminum layer, where each sputtering step includes at least one sputtering parameter that is different from a corresponding sputtering parameter of another sputtering step. The surface of the semiconductor device includes a dielectric layer having a plurality of openings formed through the dielectric layer.

Semiconductor apparatus
10229948 · 2019-03-12 · ·

A semiconductor apparatus includes a conductive member penetrating through a first semiconductor layer, a first insulator layer, and a third insulator layer, and connecting a first conductor layer with a second conductor layer. The conductive member has a first region containing copper, and a second region containing a material different from the copper is located at least between a first region and the first semiconductor layer, between the first region and the first insulator layer, and between the first region and the third insulator layer. A diffusion coefficient of the copper to a material is lower than a diffusion coefficient of the copper to the first semiconductor layer and a diffusion coefficient of the copper to the first insulator layer.

HIGH VOLTAGE GALVANIC ISOLATION DEVICE

A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.

Semiconductor devices and methods for forming a semiconductor device
10224237 · 2019-03-05 · ·

A method for forming a semiconductor device includes forming an insulating material layer above a semiconductor substrate and modifying at least a portion of a surface of the insulating material layer after forming the insulating material layer. Further, the method includes forming an electrical conductive structure on at least the portion of the surface of the insulating material layer after modifying at least the portion of the surface of the insulating material layer.

Integrated system and method of making the integrated system
10224317 · 2019-03-05 · ·

A system and method of manufacturing a system are disclosed. An embodiment of the system includes a first packaged component comprising a first component and a first redistribution layer (RDL) disposed on a first main surface of the first packaged component, wherein the first RDL includes first pads. The system further includes a second packaged component having a second component disposed at a first main surface of the second packaged component, the first main surface having second pads and a connection layer between the first packaged component and the second packaged component, wherein the connection layer connects a first plurality of the first pads with the second pads.

Semiconductor device
10217832 · 2019-02-26 · ·

A semiconductor device is provided that includes a semiconductor substrate; an insulating film that is provided on the semiconductor substrate, has an opening through which the semiconductor substrate is exposed, and contains oxygen; a first barrier metal portion that is provided at least on a bottom portion of the opening and in which one or more kinds of films are laminated; and an upper electrode provided above the insulating film. The barrier metal is not provided between an upper surface of the insulating film and the upper electrode, or the semiconductor device further comprises a second barrier metal portion between the upper surface of the insulating film and the upper electrode, the second barrier metal portion having a configuration different from that of the first barrier metal portion.

SUPERCONDUCTING DEVICE WITH THERMALLY CONDUCTIVE HEAT SINK

An integrated circuit is provided that comprises a resistor, a first superconducting structure coupled to a first end of the resistor, and a second superconducting structure coupled to a second end of the resistor. A thermally conductive heat sink structure is coupled to the second end of the resistor for moving hot electrons from the resistor prior to the electrons generating phonons.

Silicon shielding for baseband termination and RF performance enhancement

An RF amplifier device includes a semiconductor die and an integrated passive device (IPD) on a ground flange. The IPD includes a semiconductor substrate and a metal-insulator-metal (MIM) capacitor coupled to the semiconductor substrate. The MIM capacitor includes a first electrode, a second electrode, and a dielectric between the first electrode and the second electrode. A first RF capacitor is over the semiconductor substrate and a second RF capacitor is over the semiconductor substrate. A metal layer is patterned to form a portion of an elevated metal shielding structure, a first plate of the first RF capacitor and a first plate of the second RF capacitor. The elevated metal shielding structure is over the MIM capacitor. The IPD is electrically coupled to the semiconductor die.

Corrosion resistant aluminum bond pad structure

A method of manufacturing a bond pad structure may include depositing an aluminum-copper (AlCu) layer over a dielectric layer; and depositing an aluminum-chromium (AlCr) layer directly over the AlCu layer.