A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

A semiconductor device may include a semiconductor substrate, a first bonding pad provided on an upper surface of the semiconductor substrate and constituted of a metal including aluminum, a second bonding pad provided on the upper surface of the semiconductor substrate, and a first protrusion protruding from an upper surface of the first bonding pad. The first protrusion may be provided on the upper surface of the first bonding pad only at a position adjacent to a peripheral edge of the first bonding pad, the peripheral edge of the first bonding pad may be opposed to the second bonding pad.

A wire bond system. Implementations may include: a bond wire including copper (Cu), a bond pad including aluminum (Al) and a sacrificial anode electrically coupled with the bond pad, where the sacrificial anode includes one or more elements having a standard electrode potential below a standard electrode potential of Al.

A remapped extracted die is provided. The remapped extracted die includes an extracted die removed from a previous integrated circuit package. The extracted die includes a plurality of original bond pads having locations that do not correspond to desired pin assignments of a new package base and an interposer, bonded to the extracted die. The interposer includes first bond pads configured to receive new bond wires from the plurality of original bond pads, and second bond pads corresponding to desired pin assignments of the new package base, each individually electrically coupled to one of the first bond pads and configured to receive new bond wires from package leads or downbonds of the new package base.

A method and structure for improving high voltage breakdown reliability of a microelectronic device, e.g., a galvanic digital isolator, involves providing an abatement structure around metal plate corners of a high voltage isolation capacitor to ameliorate the effects of an electric field formed thereat during operation of the device due to dielectric discontinuity.

In order to inhibit forming cracks under a pad opening during ball bonding without increasing a chip size, a protective film includes a pad opening that exposes a part of a topmost layer metal film. A second metal film provided under the pad opening has a ring shape that defines a rectangular opening under the pad opening. The opening edge of the opening in the second metal film extends inwardly beyond the edge of the overlying pad opening.

A semiconductor device is disclosed including at least first and second vertically stacked and interconnected groups of semiconductor packages. The first and second groups of semiconductor packages may differ from each other in the number of packages and functionality.

A method for replacing a capillary of a wire bonding apparatus that includes a holding unit that holds a capillary includes transferring a capillary replacing unit to the wire bonding apparatus by a mobile robot in response to receiving a capillary replacement start signal from the wire bonding apparatus, separating, by the capillary replacing unit, the capillary corresponding to the replacement signal from the wire bonding apparatus, and installing, by the capillary replacing unit, a new capillary in the wire bonding apparatus.

A method and structure for improving high voltage breakdown reliability of a microelectronic device, e.g., a galvanic digital isolator, involves providing an abatement structure around metal plate corners of a high voltage isolation capacitor to ameliorate the effects of an electric field formed thereat during operation of the device due to dielectric discontinuity.

A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.