A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

An insulated-gate field effect transistor includes a substrate having a drift region and a source region of first conductivity type, and a base region and shielding region of second conductivity type therein. The base region forms a first P-N junction with the source region and the shielding region extends between the drift region and the base region. A transition region of first conductivity type is provided, which is electrically coupled to the drift region. The transition region extends between a first surface of the substrate and the shielding region, and forms a second P-N junction with the base region. An insulated gate electrode is provided on a first surface of the substrate. The insulated gate electrode has an electrically conductive gate therein with a drain-side sidewall extending intermediate the second P-N junction and an end of the shielding region when viewed in transverse cross-section.

Methods, systems, and apparatuses are described for integrated circuit controlled ejection system (ICCES) for massively parallel integrated circuit assembly (MPICA). A unique Integrated Circuit (IC) die ejection head assembly system is described, which utilizes Three-Dimensional (3D) printing to achieve very high resolution manufacturing to meet the precision tolerances required for very small IC die sizes.

Methods, systems, and apparatuses are described for integrated circuit controlled ejection system (ICCES) for massively parallel integrated circuit assembly (MPICA). A unique Integrated Circuit (IC) die ejection head assembly system is described, which utilizes Three-Dimensional (3D) printing to achieve very high resolution manufacturing to meet the precision tolerances required for very small IC die sizes.

A transistor includes a semiconductor region provided on a substrate and three different terminal electrodes. At least one terminal electrode has an isolated electrode structure composed of a plurality of conductor patterns. A bump, which electrically connects the plurality of conductor patterns to each other, is arranged on the terminal electrode having the isolated electrode structure. A stress-relaxing layer, which is composed of a metal material containing a high-melting-point metal, is arranged between the semiconductor region of the transistor and the bump. No current path for connecting the plurality of conductor patterns to each other is arranged between the conductor patterns and the bump.

Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. A substrate of the RFID IC, or a portion of the IC substrate, electrically couples the first circuit block to at least one of the first and second antenna contacts. The IC includes one or more interfaces or barrier regions that at least partially electrically isolate the first circuit block from the rest of the IC substrate.