An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a semiconductor (S-Layer), and an interfacial dielectric layer (I-Layer) of less than 4 nm thickness disposed between and in contact with both the M-Layer and the S-Layer. The I-Layer is an oxide of a metal or a semiconductor. The conductor of the M-Layer that is adjacent to and in direct contact with the I-Layer is a metal oxide that is electrically conductive, chemically stable and unreactive at its interface with the I-Layer at temperatures up to 450 C. The electrical contact structure has a specific contact resistivity of less than or equal to approximately 10.sup.5-10.sup.7 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 210.sup.19 cm.sup.3 and less than approximately 10.sup.8 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 10.sup.20 cm.sup.3.

Devices, structures, and methods thereof for providing a Schottky or Schottky-like contact as a source region and/or a drain region of a power transistor are disclosed. A power transistor structure comprises a substrate of a first dopant polarity, a drift region formed on or within the substrate, a body region formed on or within the drift region, a gate structure formed on or within the substrate, a source region adjacent to the gate structure, a drain region formed adjacent to the gate structure. At least one of the source region and the drain region is formed from a Schottky or Schottky-like contact substantially near a surface of the substrate, comprising a silicide layer and an interfacial dopant segregation layer. The Schottky or Schottky-like contact is formed by low-temperature annealing a dopant segregation implant in the source and/or drain region.

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

Semiconductor devices include a semiconductor layer comprising a channel region and source/drain regions. A gate stack is formed on the channel region. A dielectric layer is formed on the semiconductor layer in the source/drain regions. Source/drain structures are formed over the dielectric layer in the source/drain regions.

An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a semiconductor (S-Layer), and an interfacial dielectric layer (I-Layer) of less than 4 nm thickness disposed between and in contact with both the M-Layer and the S-Layer. The I-Layer is an oxide of a metal or a semiconductor. The conductor of the M-Layer that is adjacent to and in direct contact with the I-Layer is a metal oxide that is electrically conductive, chemically stable and unreactive at its interface with the I-Layer at temperatures up to 450 C. The electrical contact structure has a specific contact resistivity of less than or equal to approximately 10.sup.5-10.sup.7 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 210.sup.19 cm.sup.3 and less than approximately 10.sup.8 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 10.sup.20 cm.sup.3.

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

A device and structure for providing electrostatic discharge (ESD) protection. Schottky barrier diode (SBD) structure comprising a substrate of a first dopant polarity, a well region of a second dopant polarity formed on or within said substrate, an anode region of a first dopant polarity, a cathode of a second polarity, and a rectifying contact on said anode and/or said cathode, wherein said rectifying contact is formed substantially near the surface of said substrate to provide a rectifying barrier junction between the conducting layer and the semiconductor substrate, providing electrical coupling in said Schottky Barrier diode structure. The disclosure further includes SOI Schottky Barrier polysilicon-bound diodes (also known as Lubistor structures). Additionally, a diode configured SOI dynamic threshold MOSFET with rectifying barrier junctions on the drain or source region.

An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a semiconductor (S-Layer), and an interfacial dielectric layer (I-Layer) of less than 4 nm thickness disposed between and in contact with both the M-Layer and the S-Layer. The I-Layer is an oxide of a metal or a semiconductor. The conductor of the M-Layer that is adjacent to and in direct contact with the I-Layer is a metal oxide that is electrically conductive, chemically stable and unreactive at its interface with the I-Layer at temperatures up to 450 C. The electrical contact structure has a specific contact resistivity of less than or equal to approximately 10.sup.5-10.sup.7 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 210.sup.19 cm.sup.3 and less than approximately 10.sup.8 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 10.sup.20 cm.sup.3.

Semiconductor devices and method of forming the same include forming a sacrificial layer on source/drain regions of a semiconductor layer. A reactant layer is formed on the sacrificial layer. The reactant layer and sacrificial layer are annealed to convert the reactant layer to a dielectric layer. Source and drain regions are formed on the dielectric layer.