An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

A manufacturing method of a semiconductor structure includes the following steps. An epitaxial region is formed in a semiconductor substrate. A dielectric layer is formed on the epitaxial region, and a contact hole is formed in the dielectric layer. The contact hole exposes a part of the epitaxial region, and an oxide-containing layer is formed on the epitaxial region exposed by the contact hole. A contact structure is formed in the contact hole and on the oxide-containing layer. The oxide-containing layer is located between the contact structure and the epitaxial region. A semiconductor structure includes the semiconductor substrate, at least one epitaxial region, the contact structure, the oxide-containing layer, and a silicide layer. The contact structure is disposed on the epitaxial region. The oxide-containing layer is disposed between the epitaxial region and the contact structure. The silicide layer is disposed between the oxide-containing layer and the contact structure.

An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a semiconductor (S-Layer), and an interfacial dielectric layer (I-Layer) of less than 4 nm thickness disposed between and in contact with both the M-Layer and the S-Layer. The I-Layer is an oxide of a metal or a semiconductor. The conductor of the M-Layer that is adjacent to and in direct contact with the I-Layer is a metal oxide that is electrically conductive, chemically stable and unreactive at its interface with the I-Layer at temperatures up to 450 C. The electrical contact structure has a specific contact resistivity of less than or equal to approximately 10.sup.5-10.sup.7 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 210.sup.19 cm.sup.3 and less than approximately 10.sup.8 -cm.sup.2 when the doping in the semiconductor adjacent the MIS contact is greater than approximately 10.sup.20 cm.sup.3.

Implementations of the present disclosure generally relate to improved semiconductor devices and methods of manufacture thereof. More specifically, implementations disclosed herein relate to a semiconductor device having an improved contact interface between the semiconductor material and metal material and methods of manufacture thereof. The method includes forming a semiconductor layer on a silicon substrate, forming an interfacial layer over the semiconductor layer, and forming a metal contact layer over the interfacial layer. The interfacial layer comprises one or more of germanium, boron, gallium, indium, thallium, arsenic, antimony, tin, silicon, and phosphorus, and has a thickness of between about 50 angstroms and about 100 angstroms. The interfacial layer improves the quality of the contact interface between the semiconductor material and metal material.

A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a semiconductive layer positioned under the gate and having protrusions that protrude laterally with respect to the gate; anisotropically etching at least one of the protrusions by using the control gate as a mask, so as to form a recess in this protrusion, this recess defining a lateral face of the semiconductive layer; depositing a layer of insulator on the lateral face of the semiconductive layer; and depositing a metal in the recess on the layer of insulator so as to form a contact of metal/insulator/semiconductor type between the deposit of metal and the lateral face of the semiconductive layer.

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.