An embodiment semiconductor structure includes a first active region and a second active region extending along a first direction, a functional gate structure and a non-functional gate structure aligned with each other and extending along a second direction, and a metallization layer over the functional gate structure and the non-functional gate structure. The metallization layer defines a first metallization region, a second metallization region, and one or two middle metallization regions between the first metallization region and the second metallization region. The functional gate structure overlaps the first metallization region and overlaps one of the one or two middle metallization regions to define an overlapped portion of the one of the one or two middle metallization regions. The overlapped portion has a space defined therein sized for a connection feature between the functional gate structure and the one of the one or two middle metallization regions.