Patent classifications
H10P72/145
SUBSTRATE STORAGE RACKS FOR SEMICONDUCTOR PROCESSING SYSTEMS
A substrate storage rack for a semiconductor processing system may include a bottom plate, a top plate, and/or at least one column assembly. The top plate may be spaced apart from the bottom plate, and the column assembly may connect the top plate to the bottom plate. The column assembly may have multiple protrusion elements. Each protrusion element may have a top surface opening that supports a ball member. Each ball member in the column assembly may protrude upward from its respective protrusion element toward the top plate and may be configured to support a substrate within the rack. Semiconductor processing systems and methods of making substrate storage racks are also described.
Semiconductor device and methods of making and using an enhanced carrier to reduce electrostatic discharge
A semiconductor device is made with a boat carrier including stainless steel. A Polytetrafluoroethylene (PTFE) layer is formed over the boat carrier. A semiconductor package substrate is disposed over the boat carrier. A manufacturing step is performed on the semiconductor package substrate. An electrostatic discharge (ESD) is imparted on the boat carrier during the manufacturing step. The semiconductor package substrate is protected from the ESD by the PTFE layer.
SUBSTRATE SUPPORT APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A substrate support apparatus includes a lower support having a plate shape and having a first axis as a central axis extending in a vertical direction, an upper support on the lower support, and a connector connecting the lower support and the upper support, wherein the connector includes a connection pillar extending parallel to the first axis and at least one substrate support connected to the connection pillar and extending from the connection pillar toward the first axis, an upper surface of the at least one substrate support includes a first upper surface connected to the connection pillar and a second upper surface positioned at a vertical level lower than a vertical level of the first upper surface, and a first distance between the first upper surface and the first axis is larger than a second distance between the second upper surface and the first axis.