A device comprises a non-insulator structure, a dielectric layer, a metal via, a metal line, and a dielectric structure. The dielectric layer is over the non-insulator structure. The metal via is in a lower portion of the dielectric layer. The metal line is in an upper portion of the dielectric layer. The dielectric structure is embedded in a recessed region in the lower portion of the dielectric layer. The dielectric structure has a tapered top portion interfacing the metal via.

A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.