Patent classifications
H10W72/01271
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package may include a package substrate; first semiconductor chips sequentially stacked on an upper surface of the package substrate; a second semiconductor chip on an uppermost first semiconductor chip among the first semiconductor chips, the second semiconductor chip having an overhang region protruding from one side of the uppermost first semiconductor chip and an overlapping region overlapping the uppermost first semiconductor chip, the second chip pads including first bonding pads in the overhang region and second bonding pads in the overlapping region; first conductive bumps respectively on the first bonding pads; second conductive bumps respectively on the second bonding pads; vertical wires extending from the first conductive bumps to substrate pads of the package substrate, respectively; and a molding member covering the first semiconductor chips, the second semiconductor chip, and the vertical wires.
MIXED GAS ATMOSPHERIC PRESSURE PLASMA
An atmospheric pressure plasma apparatus and method are disclosed that operate with a multigas mixture to provide a high concentration of reactive neutral species for cleaning and activating the surfaces of substrates, including those with metal interconnects embedded in the substrate.
Solder reflow with optical endpoint control
A solder reflow system that includes a vacuum chamber and a sample chuck in the vacuum chamber to support a semiconductor wafer to be processed. The solder reflow system further include a heating element coupled to the vacuum chamber and configured to heat the semiconductor wafer, a thermocouple connected to the sample chuck to measure a temperature of the semiconductor wafer, a pyrometer positioned to detect an optical signal from the semiconductor wafer to estimate the temperature of the semiconductor wafer. The control system is configured to control the heating element to heat the semiconductor wafer, obtain one or more measurements of the temperature of the semiconductor wafer from the thermocouple and one or more estimates of the temperature of the semiconductor wafer from the pyrometer during the heating of the semiconductor wafer, and determine a modification of the heating of the semiconductor wafer based on the obtained measurements.
REMOVING METAL OXIDE FROM METALLIC CONTACTS ON SUBSTRATES, DIES AND WAFERS WITH ATMOSPHERIC PRESSURE PLASMA
A method and device for modifying a surface of a substrate with a plasma in an inert gas environment, comprises enclosing the substrate in a chamber having surrounding sidewalls and a movable coverplate above the surrounding sidewalls with a gap therebetween, affixing a plasma source to the movable coverplate having a plasma outlet through the coverplate into the chamber, purging the chamber with inert gas sufficient to reduce an oxygen concentration of the chamber to several orders of magnitude less than in air, the inert gas entering through and inlet to the chamber and exiting through an outlet from the chamber, and scanning and activating the plasma source affixed to the cover plate over the substrate, such as to expose the surface of the substrate to a reactive species generated by the plasma delivered through the plasma outlet. An inert gas environment is maintained within the chamber throughout the scanning.
SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF OPERATING THE SAME
A semiconductor manufacturing apparatus includes a flux container defining an accommodation space, the accommodation space configured to accommodate flux, a head tool configured to pick up and position a semiconductor device, semiconductor device including a connection terminal, and a vibration generator configured to apply vibrations to the flux container.
PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF
A package structure includes a redistribution structure, a die and an underfill layer. The redistribution structure includes a first insulating layer, a second insulating layer, a first redistribution layer and a first alignment mark. The first redistribution layer and the first alignment mark are located between the first insulating layer and the second insulating layer. The die is attached to the redistribution structure. The second insulating layer includes a trench laterally located between the first alignment mark and the die. The underfill layer is located between the redistribution structure and the die. A portion of the underfill layer is filled in the trench.
ELECTRONIC COMPONENT MOUNTING DEVICE AND ELECTRONIC COMPONENT MOUNTING METHOD
An electronic component mounting device (1) comprises: an electronic component supply unit (20) that supplies an electronic component having a bump electrode (EB); a transfer stage (31) that accumulates a flux (FX); a mounting stage (41) on which a substrate (BD) is placed; a plurality of heads that can each pick up an electronic component (CP); and a control unit (10) that controls movement of the plurality of heads. The control unit (10) is configured so as to cause each of the plurality of heads to function as a dipping head that dips the bump electrode (EB) of the electronic component (CP) into the flux (FX) accumulated on the transfer stage (31), or as a bonding head that mounts the electronic component (CP) to the substrate (BD) on the mounting stage (41) with the bump electrode (EB) interposed therebetween.
BONDING STRUCTURES FORMED USING SELECTIVE SURFACE TREATMENT OF COPPER BUMPS AND METHODS OF FORMING THE SAME
Methods of fabricating semiconductor devices and resulting bonded structures. An embodiment method includes tilting a plasma nozzle to an angle with respect to a substrate. The method includes applying, with the plasma nozzle, an oxidation gas onto a first side of at least one substrate-side copper bump on the substrate, forming an oxidized copper sidewall on the first side of the substrate-side copper bump. The method includes bonding a semiconductor chip to the substrate using the substrate-side copper bump.