Patent classifications
H10W20/0595
Semiconductor device structure and methods of forming the same
A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a first dielectric material disposed over the device, and an opening is formed in the first dielectric material. The semiconductor device structure further includes a conductive structure disposed in the opening, and the conductive structure includes a first sidewall. The semiconductor device structure further includes a surrounding structure disposed in the opening, and the surrounding structure surrounds the first sidewall of the conductive structure. The surrounding structure includes a first spacer layer and a second spacer layer adjacent the first spacer layer. The first spacer layer is separated from the second spacer layer by an air gap.
MULTILAYER WIRING CONNECTION STRUCTURE FOR REDUCING CONTACT RESISTANCE, AND MANUFACTURING METHOD THEREFOR
A multilayer wiring connection structure and a method for manufacturing the same are provided. The multilayer wiring connection structure includes a first insulating film positioned on a substrate, a first wiring positioned within the first insulating film, a second insulating film positioned on the first wiring, and a second wiring positioned within the second insulating film and in contact with the first wiring. The first wiring comprises a trench having at least one anisotropically etched portion and at least one isotropically etched portion under the second wiring, and the second wiring comprises an extension filling the trench.