A power semiconductor device includes a case including an air passage; a heat sink held by the case, with a plurality of fins disposed in the air passage; and a plurality of power modules. An uneven surface is formed on an opposite face of a heat sink base. The power modules each include an uneven part engaging with the uneven surface of the heat sink base and are spaced along a direction of an air flow, with the uneven parts fitted into the uneven surface of the heat sink base. One of an adjacent pair of the power modules in the direction of the air flow is disposed to offset in a direction orthogonal to the direction of the air flow relative to an other of the adjacent pair of the power modules.

A heat dissipating member includes: a sintered material portion containing copper and at least one of tungsten and molybdenum; and a plurality of silicon oxide particles dispersed in the sintered material portion. The heat dissipating member has a copper content of M.sub.Cu weight percent, a tungsten content of M.sub.W weight percent, a molybdenum content of M.sub.Mo weight percent, and a silicon oxide content of M.sub.SiO2 weight percent in terms of SiO.sub.2 equivalent, relative to a total weight of copper, tungsten, and molybdenum. The heat dissipating member satisfies: 0.9M.sub.Cu/(M.sub.Cu+M.sub.W+M.sub.Mo)0.045; and 0.01M.sub.SiO2/(M.sub.Cu+M.sub.W+M.sub.Mo)0.0003.

A package includes a substrate, and a first die, a second die, a first structural member, and a second structural member that are disposed on the substrate. A first dielectric material is disposed between the first die and the second die. The first structural member is disposed on a side that is of the first die and that is away from the substrate, and the first die is located in a region of orthographic projection of the first structural member on a surface of the substrate. The second structural member is disposed on a side that is of the second die and that is away from the substrate, the second die is located in a region of orthographic projection of the second structural member on the surface of the substrate, and there is a gap between the first structural member and the second structural member.

An apparatus, comprising an interposer; a memory module, comprising a plurality of memory chips, and mounted to the interposer; and a heatsink, fastened to the interposer and configured to compress the interposer against the memory module.

The disclosure provides a through-silicon via (TSV) interposer, a method for manufacturing therefor and a three-dimensional chip. The TSV interposer includes: a substrate, and an interior of the substrate is provided with a cavity and a first structural layer covering a part of an inner wall of the cavity, and a material type of the first structural layer is different from a material type of the substrate; a via hole structure that penetrates the substrate and is located at a side of the cavity; and liquid metal located in the cavity, and the liquid metal and the first structural layer include a same material element.

A semiconductor device, including: a first circuit board, which includes: a first insulating plate, a first conductive plate embedded in the first insulating plate, the first conductive plate including a first front surface and a first back surface that are exposed from the first insulating plate, and a second conductive plate embedded in the first insulating plate, the second conductive plate including a second front surface and a second back surface that are exposed from the first insulating plate, the second conductive plate being separated from the first conductive plate; a second circuit board including a second insulating plate on which a conductive pattern layer is laid; and a semiconductor chip group including a first semiconductor chip and a second semiconductor chip, the semiconductor chip group being sandwiched between the first circuit board and the second circuit board.