TRANSISTOR WITH BUFFER STRUCTURE HAVING CARBON DOPED PROFILE
20260122942 ยท 2026-04-30
Inventors
- Nicholas Stephen Dellas (Dallas, TX, US)
- Dong Seup Lee (McKinney, TX, US)
- Andinet Tefera Desalegn (Dallas, TX, US)
Cpc classification
H10D62/113
ELECTRICITY
H10D30/475
ELECTRICITY
H10D30/015
ELECTRICITY
International classification
H10D30/01
ELECTRICITY
H10D30/47
ELECTRICITY
H10D62/10
ELECTRICITY
H10D62/824
ELECTRICITY
Abstract
In a described example, an integrated circuit (IC) is disclosed that includes a transistor. The transistor includes a substrate, and a buffer structure overlying the substrate. The buffer structure has a first buffer layer, a second buffer layer overlying the first buffer layer, and a third buffer layer overlying the second buffer layer. The first buffer layer has a first carbon concentration, the second buffer layer has a second carbon concentration lower than the first carbon concentration, and the third buffer layer has a third carbon concentration higher than the second carbon concentration. An active structure overlies the buffer structure.
Claims
1. A semiconductor device, comprising: a substrate; and a buffer structure disposed over the substrate, the buffer structure including group-III nitride materials, wherein: a first buffer layer of the buffer structure is disposed over the substrate, the first buffer layer having a first carbon concentration; a second buffer layer of the buffer structure is disposed over the first buffer layer, the second buffer layer having a second carbon concentration less than the first carbon concentration; and a third buffer layer of the buffer structure disposed over the second buffer layer, the third buffer layer having a third carbon concentration greater than the second carbon concentration.
2. The semiconductor device of claim 1, wherein: the third buffer layer includes a portion adjacent to the second buffer layer, wherein the portion of the third buffer layer has a fourth carbon concentration greater than the first carbon concentration.
3. The semiconductor device of claim 1, wherein the buffer structure further includes a base buffer layer underneath the first buffer layer, the base buffer layer having a fourth carbon concentration less than the first carbon concentration.
4. The semiconductor device of claim 1, wherein: the first buffer layer is a first aluminum gallium nitride (AlGaN) layer; the second buffer layer is a second AlGaN layer; and the third buffer layer is a gallium nitride (GaN) layer.
5. The semiconductor device of claim 1, wherein the substrate includes silicon.
6. The semiconductor device of claim 1, further comprising: a nucleation layer including a group-Ill nitride material different than the group-Ill nitride materials of the buffer structure, the nucleation layer disposed between the substrate and the buffer structure.
7. The semiconductor device of claim 6, wherein the nucleation layer includes aluminum nitride (AlN).
8. The semiconductor device of claim 1, further comprising: a heterostructure disposed over the buffer structure, the heterostructure designed to include a sheet of electrons or a sheet of holes.
9. The semiconductor device of claim 8, wherein the heterostructure includes a layer of gallium nitride (GaN) and a layer of aluminum gallium nitride (AlGaN) on the layer of GaN.
10. The semiconductor device of claim 8, further comprising: a first contact on the heterostructure; and a second contact on the heterostructure, the second contact being laterally away from the first contact.
11. The semiconductor device of claim 8, further comprising: a gate structure disposed over the heterostructure.
12. A semiconductor device, comprising: a substrate; and a buffer structure disposed over the substrate, the buffer structure including group-III nitride materials, wherein: a first layer of the buffer structure is disposed between second and third layer of the buffer structure; and a first carbon concentration of the first layer is less than either of a second concentration of the second layer or a third concentration of the third layer.
13. The semiconductor device of claim 12, wherein: the first carbon concentration of the first layer is less than both of the second concentration of the second layer and the third concentration of the third layer.
14. The semiconductor device of claim 12, wherein: the first buffer layer is a first aluminum gallium nitride (AlGaN) layer; the second buffer layer is a second AlGaN layer; and the third buffer layer is a gallium nitride (GaN) layer.
15. The semiconductor device of claim 12, wherein the substrate includes silicon.
16. The semiconductor device of claim 12, further comprising: a nucleation layer including a group-III nitride material different than the group-III nitride materials of the buffer structure, the nucleation layer disposed between the substrate and the buffer structure.
17. The semiconductor device of claim 16, wherein the nucleation layer includes aluminum nitride (AlN).
18. The semiconductor device of claim 12, further comprising: a heterostructure disposed over the buffer structure, the heterostructure designed to include a sheet of electrons or a sheet of holes.
19. The semiconductor device of claim 18, wherein the heterostructure includes a layer of gallium nitride (GaN) and a layer of aluminum gallium nitride (AlGaN) on the layer of GaN.
20. The semiconductor device of claim 18, further comprising: a first contact on the heterostructure; and a second contact on the heterostructure, the second contact being laterally away from the first contact.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0008]
[0009]
[0010]
[0011]
[0012]
[0013]
[0014]
[0015]
[0016]
DETAILED DESCRIPTION
[0017] High electron mobility transistors (HEMTs) typically include a layer of highly-mobile electrons, which are induced by forming a heterostructure including a group III nitride-based alloy with broader band-gap (e.g., aluminum gallium nitride (AlGaN)) grown over another group III nitride material with a narrower bandgap (e.g., gallium nitride (GaN)). The large conduction-band offset, spontaneous polarization, and piezoelectric polarization in such a heterostructure induce a highly-mobile 2-dimensional electron gas (2DEG) at their interface, thus forming a channel of the transistor. For the sake of illustration, some of the description herein focus on AlGaN/GaN heterostructures. However, this description is not limited to AlGaN/GaN-based heterostructures and can be applied to other heterostructures that can induce the 2DEG at their interface. Existing semiconductor fabrication techniques can be used to manufacture HEMTs using AlGaN/GaN-based heterostructures on a substrate (e.g., a semiconductor wafer).
[0018] HEMTs are fabricated such that the 2DEG is formed between the source and drain contact structures of the HEMT. A gate contact structure is generally positioned between the source and drain contact structures. HEMTs can be classified as enhancement mode HEMTs or depletion mode HEMTs. Enhancement mode HEMTs are designed such that a depletion region forms under the gate contact structure at the AlGaN/GaN interface, meaning that electrons under the gate contact structure are depleted, making enhancement mode HEMTs normally-OFF devices. Enhancement mode HEMTs can be turned ON by applying a positive threshold voltage to the gate contact structure. On the other hand, depletion mode HEMTs are designed such that the 2DEG is always present at the AlGaN/GaN interface between the source and drain contact structures, meaning that depletion mode HEMTs are normally-ON devices. Depletion mode HEMTs are turned OFF by applying a negative threshold voltage to the gate contact structure.
[0019] In high-voltage (e.g., operating voltage over 500V) applications, both enhancement and depletion mode HEMTs suffer from a back gating effect in that the high voltage between the drain of the device and the substrate depletes the channel. Therefore, a buffer structure or stack formed of multiple epitaxial layers is fabricated between the substrate and the channel formed by the 2DEG. The buffer needs to be relatively thick and resistive/capacitive enough to provide the necessary isolation and handle the high voltage applied between the drain and the substrate. The buffers of the GaN HEMTs typically require carbon doping to create current collapse reliability issues. That is GaN due to its natural impurities, such as Oxygen and/or Nitrogen, results in a n-type behavior. Carbon behaves as an acceptor resulting in the GaN behaving as a p-type device mitigating current collapse. However, excessive doping can result in vertical leakage issues in the buffer structure.
[0020] Accordingly, at least some of the examples disclosed herein are directed towards an HEMT with a modulated carbon concentration profile through the buffer structure in order to maintain both low vertical leakage and improved back gating behavior. At least some of the examples are directed towards GaN-based HEMTs. Increasing carbon within a buffer layer of GaN increases the resistance and capacitance of the respective layer. By modulating the carbon within the buffer layers of the buffer structure, a device with lower vertical leakage and improved back gating behavior is obtained. Other types of GaN type devices with a buffer structure could employ the modulated carbon concentration profile.
[0021] In one example, a first buffer layer has a first carbon concentration, a second buffer layer overlying the first buffer layer has a second carbon concentration, and a third buffer layer overlying the second buffer layer has a third carbon concentration, wherein the second carbon concentration is less than the first carbon concentration, and the third carbon concentration is greater than the second carbon concentration to provide a saw tooth carbon concentration profile. In a further example, the first buffer layer is formed of AlGaN, the second buffer layer is formed of AlGaN and the third buffer layer is formed of GaN.
[0022]
[0023] As far as the relative percentages between aluminum and gallium, the percentage of aluminum in the each of the plurality of AlGaN layers can range from about 0.1 to 100 percent (i.e., AlxGa1-xN, where x=0.001 to 1). For example, the percentage of aluminum in each of the plurality of AlGaN layers can be between about 20% and 100% aluminum-content aluminum gallium nitride. The plurality of AlGaN layers can be graded or non-graded. In one example, the plurality of AlGaN layers are graded, the term graded being used to denote the process of gradually changing the percentage of aluminum to its specified percentage, relative to the percentage of gallium.
[0024] In one example, the plurality of AlGaN layers includes one or more base AlGaN buffer layers 106 overlying the nucleation layer 104, a first AlGaN buffer layer 108 overlying the one or more base AlGaN buffer layers 106, and a second AlGaN buffer layer 110 overlying the first AlGaN buffer layer 108. A GaN cap buffer layer 112 overlies the second AlGaN buffer layer 110. As previously stated, the plurality of AlGaN layers can be graded. For example, the one or more base AlGaN buffer layers 106 can contain 75% aluminum, the first AlGaN buffer layer 108 can contain 50% aluminum and the second AlGaN buffer layer 110 can contain 25% aluminum. The varying of aluminum content facilitates strain management due to the different lattice structure of the GaN cap buffer layer 112 relative to AlGaN buffer layers. The thickness of each of the plurality of AlGaN buffer layers and the GaN cap buffer layer 112 are selected to provide the appropriate support to handle the voltage across the HEMT device 101.
[0025] The active structure 130 overlies the buffer structure 105 and includes a single heterostructure of an AlGaN channel layer 116 overlying a GaN channel layer 114. A channel is formed from the interface between the AlGaN channel layer 116 and the GaN channel layer 114. Although the present example is illustrated with respect to employing a layer of AlGaN overlying a layer of GaN to form a heterostructure, a variety of heterostructures could be employed as long as the heterostructure comprises two layers of dissimilar materials designed to create a sheet of electrons (i.e. a 2DEG channel) or a sheet of holes (i.e., a 2DHG channel) at the interface between the two dissimilar materials. Various heterostructure materials are known to produce 2DEG and 2DHG channels at the interface therebetween, including but not limited to Aluminum Gallium Nitride (AlGaN) and Gallium Nitride (GaN), Aluminum Gallium Arsenide (AlGaAs) and Gallium Arsenide (GaAs), Indium Aluminum Nitride (InAlN) and Gallium Nitride (GaN), alloys of Silicon (Si) and Germanium (Ge), and noncentrosymmetric oxides heterojunction overlying a buffer structure.
[0026] A gate contact structure 120 resides between a source contact 118 and a drain contact 126 each overlying the AlGaN channel layer 116. The gate contact structure 120 includes a gate barrier 124 (e.g., silicon nitride) disposed between a gate contact 122 and the AlGaN layer 116. The gate contact 122, the drain contact 118 and the source contact 126 can be formed of gold, nickel or some other contact material. The gate contact structure 120 controls the turning off and on of the HEMT device, and thus the current flowing between the source contact 118 and the drain contact 126. In this example, the HEMT device 101 is a depletion mode device that is normally on, unless a negative bias is applied at the gate contact 122 to turn the device off. The present example is illustrated with the gate contact structure 120, the drain contact 118 and the source contact 126 residing directly on the AlGaN, however, the gate contact structure 120, the drain contact 118 and the source contact 126 can each be configured respectively in a variety of different transistor configuration in which the contacts are embedded in the AlGaN layer 116 and/or disposed on other layers positioned in between one or more of the gate contact structure 120, the source contact 118 and the drain contact 126.
[0027] In the example of
[0028]
[0029]
[0030] In the example of
[0031] Turning now to
[0032] For example, the deposition chamber can undergo and in-situ cleaning prior to disposing the substrate into the deposition chamber. The in-situ cleaning can be performed within the ranges of about 5 minutes to about 15 minutes at a temperature of about 750 C. to about 1250 C. at a pressure of about 35 millimeter bars (mmbars) to about 65 mmbars. The silicon nitride layer 402 can be formed above one or more other nucleation layers, such as a high temperature aluminum nitride layer overlying a low temperature aluminum nitride layer. The silicon nitride layer 402 can be formed by concurrently flowing TMA within the ranges from about 400 stand cubic centimeters (sccm) to about 750 sccm and ammonia at about 1200 sccm to about 1700 sccm for about 25 minutes to about 45 minutes at a temperature of about 850 C. to about 1300 C. at a pressure of about 35 mmbars to about 65 mmbars. The one or more base AlGaN buffer layers 404 can be formed by concurrently flowing TMA within the ranges from about 550 sccm to about 850 sccm, TMG from about 50 sccm to about 75 sccm and ammonia at about 3500 sccm to about 6000 sccm for about 20 minutes to about 30 minutes at a temperature of about 850 C. to about 1300 C. at a pressure of about 35 mmbars to about 65 mmbars.
[0033]
[0034]
[0035] Next, the partially fabricated HEMT of
[0036]
[0037] The GaN channel layer 800 can be formed by concurrently flowing TMG from about 150 sccm to about 250 sccm, and ammonia at about 25000 sccm to about 40000 sccm for about 10 minutes to about 25 minutes at a temperature of about 800 C. to about 1300 C. at a pressure of about 150 mmbars to about 250 mmbars. The AlGaN channel layer 810 can be formed by concurrently flowing TMA within the ranges from about 75 sccm to about 160 sccm, TMG from about 40 sccm to about 65 sccm and ammonia at about 7000 sccm to about 11000 sccm for about 2 minutes to about 3 minutes at a temperature of about 800 C. to about 1250 C. at a pressure of about 50 mmbars to about 100 mmbars.
[0038]
[0039] For purposes of simplification of explanation the terms overlay, overlaying, underlay and underlying (and derivatives) are employed throughout this disclosure to denote a relative position of two adjacent surfaces in a selected orientation. Additionally, the terms top and bottom employed throughout this disclosure denote opposing surfaces in the selected orientation. Similarly, the terms upper and lower denote relative positions in the selected orientation. In fact, the examples used throughout this disclosure denote one selected orientation. In the described examples, however, the selected orientation is arbitrary and other orientations are possible (e.g., upside down, rotated by 90 degrees, etc.) within the scope of the present disclosure.
[0040] What have been described above are examples of the invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the invention, but one of ordinary skill in the art will recognize that many further combinations and permutations of the invention are possible. Accordingly, the invention is intended to embrace all such alterations, modifications, and variations that fall within the scope of this application, including the appended claims.