A built-in-self-test (BIST) circuit is connected to a processor and a sigma-delta modulator (SDM) and includes an averaging circuit, a reference signal generator, and a comparator. The averaging circuit calculates an average of a sum of a set of bit signals of the SDM output signal over a period of time period, and generates an average SDM signal. The reference signal generator generates a reference SDM signal based on an SDM input signal. The comparator compares the voltage levels of the average SDM and reference SDM signals with a threshold value, and generates a test output signal based on the comparison.

The present application discloses a data converter (112). The data converter includes an input terminus (98), a digital-to-analog (D/A) converter (116) and a mapping unit (114). The input terminus is configured to receive an input signal. The D/A converter includes a plurality of D/A converter units configured to generate an output signal. The mapping unit is coupled between the input terminus and the D/A converter and is configured to cause the plurality of D/A conversion units to be equivalently arranged in a relative order in which the plurality of D/A conversion units are gated according to specific electrical characteristics of the plurality of D/A conversion units for digital-to-analog conversion. The present application further provides an A/D converter, a D/A converter and a related chip.

A portable audio device may be configured to measure load characteristics of headphones. The device may measure direct current (DC) and/or alternating current (AC) characteristics of the load. These characteristics may be measured by an audio component, such as an audio codec chip or integrated circuit (IC) controller, and reported to software or firmware executing on a processor coupled to the audio component. The software or firmware may then take action based on the measured load characteristics. For example, the load characteristics may be compared to a database of headphones and their known load characteristics to determine a particular headphone model or type of headphone attached to the audio output. The processor may then apply an appropriate equalization curve.

A portable audio device may be configured to measure load characteristics of headphones. The device may measure direct current (DC) and/or alternating current (AC) characteristics of the load. These characteristics may be measured by an audio component, such as an audio codec chip or integrated circuit (IC) controller, and reported to software or firmware executing on a processor coupled to the audio component. The software or firmware may then take action based on the measured load characteristics. For example, the load characteristics may be compared to a database of headphones and their known load characteristics to determine a particular headphone model or type of headphone attached to the audio output. The processor may then apply an appropriate equalization curve.

A semiconductor device that enables a memory size reduction is provided. The semiconductor device includes a converter circuit, a memory circuit, and a detection circuit. The converter circuit has a function of converting first data that includes a digital voltage value to second data that includes an analog current value. The memory circuit has a function of storing third data that includes an analog current value. The detection circuit has a function of generating data that indicates whether the analog current values of the second and third data match.

An electronic device may be configured to identify a load coupled to the device. The device may measure direct current (DC) and/or alternating current (AC) impedances of the load to identify the load. The device may then take action based on the identification of the load. For example, a specific transducer may be identified as coupled to the electronic device and an appropriate equalization curve applied to an audio output of the device. The measurement of load impedance may include controlling a reference generator according to a search algorithm to identify the load, including compensating the measured impedance for temperature changes. An analog-to-digital converter (ADC) may operate through the search algorithm to provide feedback to digital circuitry regarding how to proceed through the search algorithm to identify the load.

An electronic device may be configured to identify a load coupled to the device. The device may measure direct current (DC) and/or alternating current (AC) impedances of the load to identify the load. The device may then take action based on the identification of the load. For example, a specific transducer may be identified as coupled to the electronic device and an appropriate equalization curve applied to an audio output of the device. The measurement of load impedance may include controlling a reference generator according to a search algorithm to identify the load, including compensating the measured impedance for temperature changes. An analog-to-digital converter (ADC) may operate through the search algorithm to provide feedback to digital circuitry regarding how to proceed through the search algorithm to identify the load.

An integrated circuit, including: at least three integrated circuit portions mutually spaced on a single electrically insulating die, the integrated circuit portions being mutually galvanically isolated; and signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween.

An integrated circuit, including: at least three integrated circuit portions mutually spaced on a single electrically insulating die, the integrated circuit portions being mutually galvanically isolated; and signal coupling structures on the die to allow communication of signals between the integrated circuit portions while maintaining the galvanic isolation therebetween.

In accordance with an embodiment, a circuit includes a current digital-to-analog converter (DAC) having a current switching network coupled to a current DAC output, a first cascode current source coupled between a first supply node and the current switching network, a second cascode current source between a second supply node and the current switching network, and a shorting switch coupled between a first cascode node of the first cascode current source, and a second cascode node of the second cascode current source.