Consistent with the present disclosure, low pass filters are provided in the electrical paths connecting digital to analog converter (DAC) circuitry to an optical block package (also referred to as a “gold box”). The low pass filter blocks or substantially attenuates high frequency noise components present in an analog signal output from the DAC, thereby reducing errors that might otherwise be present in the transmitted data.

A method and circuit for performing vector operations may include, for each sequentially performed operation, operating a switch that corresponds to a current bit-order. Operating the switch may cause a value corresponding to an output of the operation to be stored on a capacitor corresponding to the current bit-order. A time interval during which the switch is operated may be non-uniform with respect to time intervals for other switches, and the time interval may be based at least in part on a settling time of the capacitor. The method may also include performing a bit-order weighted summation of values stored on the plurality of capacitors to generate a result of the vector operation.

An apparatus includes a memory array. The array in turn includes a plurality of word lines, a plurality of bit line pairs intersecting the plurality of word lines at a plurality of cell locations, and a plurality of memory cells, coupled to the plurality of word lines and the plurality of bit line pairs, and located at the plurality of cell locations. A plurality of word line drivers are coupled to the plurality of word lines, a dynamic voltage boost is coupled to the memory array, and a controller is coupled to the plurality of word line drivers and the dynamic voltage boost. The controller is configured to cause the dynamic voltage boost to boost the cells during a multiply accumulate operation.

An audio service module is communicatively connected to an audio abstraction module. The audio abstraction module is communicatively connected to a codec driver. The codec driver is communicatively connected to a codec chip. The audio service module receives a headset insertion/removal message and sends the message to the audio abstraction module. The audio abstraction module determines a digital-to-analog converter DAC channel configuration policy in the codec chip based on the headset insertion/removal message, and sends the DAC channel configuration policy to the codec driver. A DAC channel is used to transmit earpiece or headset data, and transmit motor data to a class-D amplifier to drive the motor. The codec driver controls the codec chip to reconfigure the DAC channel based on the DAC channel configuration policy.

Systems and methods for processing and storing digital information are described. One embodiment includes a method for linearizing digital-to-analog conversion including: receiving an input digital signal; segmenting the input digital signal into several segments, each segment being thermometer-coded; generating a redundant representation of each of the several segments, defining several redundant segments; performing a redundancy mapping for the several segments, defining redundantly mapped segments; assigning a probabilistic assignment for redundantly mapped segments; converting each redundantly mapped segment into an analog signal by a sub-digital-to-analog converter (DAC); and combining the analog signals to define an output analog signal.

Systems and methods for facilitating intercom communication for one or more quick-service restaurant drive-throughs are disclosed. Exemplary implementations may: capture sound from a customer placing an order; generate order information signals that represent the captured sound; encode signals to form order data packets; transmit the order data packets to a base station through a single pair of wires that is also used to provide power; decode information from the order data packets; and generate order sound based on the decoded information, such that the generated order sound is audible to a staff member of the quick service restaurant through a headset.

Systems and methods for facilitating intercom communication for one or more quick-service restaurant drive-throughs are disclosed. Exemplary implementations may: capture sound from a customer placing an order; generate order information signals that represent the captured sound; encode signals to form order data packets; transmit the order data packets to a base station through a single pair of wires that is also used to provide power; decode information from the order data packets; and generate order sound based on the decoded information, such that the generated order sound is audible to a staff member of the quick service restaurant through a headset.

A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

A spur correction system for a transmit chain having an interleaving multiplexer. In some embodiments, the spur correction system includes a spur sense chain, a correction controller, and a Q path corrector. The interleaving multiplexer combines signals from multiple bands in response to a clock signal. The spur sense chain estimates an error that is in phase with the clock signal (an I-phase error) and an error that is a derivative of the clock signal (a Q-phase error). The correction controller compensates for the estimated I-phase error by injecting an I-phase correction signal into the transmit chain. The Q path corrector compensates for the estimated Q-phase error by selectively connecting one or more capacitors within the interleaving multiplexer.