A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit. A Current Digital to Analog Converter (IDAC) scales the output of the VWT and provides the scaled output to an amplifier bias input.

A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit. A Current Digital to Analog Converter (IDAC) scales the output of the VWT and provides the scaled output to an amplifier bias input.

The present invention provides a heater temperature control circuit including a heater and a control circuit that controls a temperature of the heater, wherein the control circuit includes a bridge circuit in which a first circuit and a second circuit are connected in parallel, and an operational amplifier connected to the bridge circuit, wherein in the first circuit, the heater and a resistor are connected in series, and a midpoint of the first circuit is connected to one input portion of the operational amplifier, and an output value V.sub.out from the second circuit is input to the other input portion of the operational amplifier, the output value V.sub.out being obtained by multiplying a division ratio of a target resistance value R.sub.h of the heater and a resistance value R.sub.1 of the resistor with a reference voltage V.sub.ref of the bridge circuit.

A digital-to-analog converter system has digital-to-analog converters, a common output, and a digital controller for transmitting first codes to one of the converters at a radio-frequency digital rate, and for transmitting second codes to another one of the converters at the same rate. The digital controller includes a timing system for operating each converter at the digital rate in a return-to-zero configuration, such that a signal from the first converter is transmitted to the common output while the second converter is reset, and vice versa. The digital-to-analog converter system can generate a radio-frequency analog signal having signals in first and second Nyquist zones simultaneously.

A peak current mode ‘PCM’ controller comprising control logic arranged to produce a series of digital control values derived from a voltage sense signal, control logic arranged to produce a digital slope compensation value, a first digital to analogue converter ‘DAC’ arranged to receive the series of digital control values and output a corresponding analogue control voltage, a second DAC arranged to receive the digital slope compensation value and output a corresponding analogue slope compensation voltage, an analogue differential integrator arranged to receive the analogue control voltage and the analogue slope compensation voltage, integrate the analogue slope compensation voltage, subtract the integrated slope compensation voltage from the analogue control voltage, and output the result of the subtraction as an analogue output voltage, a comparator arranged to compare the analogue output voltage to a voltage of an analogue current sense signal and produce an output signal when the analogue current sense signal voltage is equal to or exceeds the analogue output voltage, and control logic arranged to produce a drive signal in response to the output signal.

A current mirror circuit includes a first MOS-type transistor and a second MOS-type transistor assembled as a current mirror, wherein the first transistor has a first gate length different from a second gate length of the second transistor.

A current mirror circuit includes a first MOS-type transistor and a second MOS-type transistor assembled as a current mirror, wherein the first transistor has a first gate length different from a second gate length of the second transistor.

Systems, devices, computer-implemented methods, and/or computer program products that facilitate low power, wideband multitone generation. In one example, a multitone generator device can comprise a controller operatively coupled to first and second digital-to-analog converters (DACs). The controller can apply different delays of a sampling signal to the first and second DACs to facilitate sideband suppression of signals output by the first and second DACs. One aspect of such a multitone generator device is that the multitone generator device can facilitate low power, wideband multitone generation.

A digital-to-analog converter circuit that creates an analog waveform from an input digital waveform. Operating the circuit comprises using the input digital waveform to 1) operate a charge control switch to set a charge time period, 2) operate a discharge control switch to set a discharge time period, 3) set a charge current magnitude using a charge gain, and 4) set a discharge current magnitude using a discharge gain. A charge source electrically charges a load capacitor during the charge time period (i.e., the charge mode). A discharge source electrically discharges the load capacitor during the discharge time period (i.e., the discharge mode). A circuit output transmits the analog waveform defined by the charge mode and the discharge mode. A charge current magnitude greater than the discharge current magnitude produces an upward-sloping analog waveform. A charge current magnitude less than the discharge current magnitude produces a downward-sloping analog waveform.

A current steering digital-to-analog converter includes a plurality of current cells each including a current source circuit and a current switch circuit to selectively output a current in response to a first input signal corresponding to a digital signal; a dummy current cell including a dummy current source circuit and a dummy current switch circuit to output a current in response to a second input signal; and a current switch bias circuit coupled to the dummy current cell to track a first voltage of an internal node of the dummy current source circuit and configured to generate a first bias voltage applied to the current switch circuit.