A semiconductor device includes a channel layer formed over a substrate, a barrier layer formed on the channel layer and a gate electrode. A second gate electrode section is formed on the gate electrode via a gate insulating film. It becomes possible to make an apparent threshold voltage applied to the second gate electrode of a MISFET higher than an original threshold voltage applied to the gate electrode for forming a channel under the gate electrode by providing an MIM section configured by the gate electrode, the gate insulating film and the second gate electrode in this way.

Semiconductor devices packages and methods are disclosed. In one embodiment, a package for a semiconductor device includes a substrate and a contact pad disposed on a first surface of the substrate. The contact pad has a first side and a second side opposite the first side. A conductive trace is coupled to the first side of the contact pad, and an extension of the conductive trace is coupled to the second side of the contact pad. A plurality of bond pads is disposed on a second surface of the substrate.

A semiconductor device has a semiconductor chip having a first surface with metallized terminals and a parallel second surface. A frame of insulating material adheres to at the sidewalls of the chip. The frame has a first surface planar with the first chip surface and a parallel second surface planar with the second chip surface. The first frame surface includes one or more embedded metallic fiducials extending from the first surface to the insulating material. At least one film of sputtered metal extends from the terminals across the surface of the polymeric layer to the fiducials. The film is patterned to form extended contact pads over the frame and rerouting traces between the chip terminals and the extended contact pads. The film adheres to the surfaces.

A method of manufacturing a semiconductor device includes providing a semiconductor substrate including a conductive pad disposed thereon; disposing a polymeric material over the semiconductor substrate and the conductive pad; patterning the polymeric material to form an opening exposing at least a portion of the conductive pad; disposing a conductive layer over the polymeric material and the portion of the conductive pad; and forming a conductor over the portion of the conductive pad and within the opening.

An electronic device can include a low-side HEMT including a segmented gate electrode; and a high-side HEMT coupled to the low-side HEMT, wherein the low-side and high voltage HEMTs are integrated within a same semiconductor die. In another aspect, an electronic device can include a source electrode; a low-side HEMT; a high-side HEMT coupled to the low-side HEMT; and a resistive element. In an embodiment, the resistive element can be coupled to the source electrode and a gate electrode of the high voltage HEMT, and in another embodiment, the resistive element can be coupled to the source electrode and a drain of the low-side HEMT. A process of forming an electronic device can include forming a channel layer over a substrate; and forming a gate electrode over the channel layer. The gate electrode can be a segmented gate electrode of a HEMT.

According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. A surface of the die includes multiple conductive elements disposed thereon. The multiple conductive elements on the surface are electrically coupled to respective nodes of the first transistor and the second transistor. Prior to assembly, the first transistor and second transistor are electrically isolated from each other. During assembly, the surface of the die including the respective conductive elements is mounted on a facing of the host substrate. Accordingly, a die including multiple independent transistors can be flipped and mounted to a respective host substrate such as printed circuit board, lead frame, etc.

Provided is a display apparatus capable of minimizing defect occurrences during manufacturing of the display apparatus while securing a long lifespan of the display apparatus. The display apparatus includes a substrate comprising a bent area between a first area and a second area and bent about a bending axis, display devices on the first area, a scan driving circuit unit on the second area, a first encapsulation layer configured to cover the display devices, and a second encapsulation layer apart from the first encapsulation layer and configured to cover the scan driving circuit unit.

A UV LED package disclosed herein includes a submount, a UV LED chip adapted to emit UV light at 200 nm to 400 nm, and a package body mounted with the submount. The submount includes a heat dissipating substrate, a first reflective electrode film and a second reflective electrode film separated from each other by an electrode separation gap on the heat dissipating substrate, a first flip-chip bonding pad and a first wire bonding pad disposed on the first reflective electrode film, and a second flip-chip bonding pad and a second wire bonding pad disposed on the second reflective electrode film. The UV LED chip includes a first conductive electrode pad corresponding to the first flip-chip bonding pad and a second conductive electrode pad corresponding to the second flip-chip bonding pad. The UV LED chip is flip-chip bonded to the submount through a first bonding bump interposed between the first flip-chip bonding pad and the first conductive electrode pad and a second bonding bump interposed between the second flip-chip bonding pad and the second conductive electrode pad. The package body includes a first metal body electrically connected to the first wire bonding pad through a first bonding wire and a second metal body separated from the first metal body by an insulating material and electrically connected to the second wire bonding pad through a second bonding wire.

A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead section adjacent to the die pad, the package regions being further constructed to be interconnected via a dicing region. The die pad in one package region and the lead section in another package region upward or downward adjacent to the package region of interest are connected to each other by an inclined reinforcement piece positioned in the dicing region.

An LED module includes: a substrate having a main surface and a back surface which face in opposite directions from each other in a thickness direction; a first LED chip including a first electrode pad bonded to a surface facing the same direction as the main surface; a first wire having one end bonded to the first electrode pad; and a wiring pattern having a main surface electrode formed in the main surface, wherein the main surface electrode includes a first die pad portion which supports the first LED chip, and when viewed from the thickness direction, the first die pad portion includes a main pad portion to which the first LED chip is bonded and an auxiliary pad portion which protrudes from the main pad portion in a direction toward a position of the first electrode pad from the center position in the first LED chip.