In accordance with an embodiment, a circuit includes a low noise amplifier transistor disposed on a first integrated circuit, a single pole multi throw (SPMT) switch disposed on a second integrated circuit, and a bypass switch coupled between a control node of the low noise amplifier transistor and an output node of the low noise amplifier transistor. The SPMT switch couples a plurality of module input terminals to a control node of the low noise amplifier transistor, and the bypass switch including a first switch coupled between the control node of the low noise amplifier transistor and an intermediate node, a second switch coupled between the intermediate node and the output node of the low noise amplifier transistor, and a third switch coupled between the intermediate node and a first reference node. The first integrated circuit and the second integrated circuit are disposed on a substrate.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal and a bias control circuit that biases the power amplifier. The power amplifier includes an amplification transistor that receives the RF signal at an input, and a first bias network and a second bias network each connected to the input. The bias control circuit includes a first switch, a first reference current source that provides the first reference current to the first bias network through the first switch, a second switch, and a second reference current source that provides the second reference current to the second bias network through the second switch.

An electronic device is provided. The electronic device includes a communication module and a processor electrically connected to the communication module, wherein the communication module includes an antenna configured to transmit and receive a communication signal, a sensor configured to measure an impedance of the antenna, and a first matching circuit and a second matching circuit electrically connected to the antenna, and the processor is configured to receive information on the impedance of the antenna from the sensor, check control information on at least one of the first matching circuit and second matching circuit corresponding to the impedance of the antenna at least partially based on the received information on the impedance of the antenna, and transmit control information generated at least partially based on the checked control information to at least one of the first matching circuit and the second matching circuit corresponding to the control information.

Optimized impedance characteristics of a variable impedance device causes the apparatus to transmit wireless signals with minimal out-of-band transmission at an optimized efficiency of the power amplifier. The variation of impedance characteristics of an antenna cause a change in the coefficients of a mapping function. The relatively fast variations to the power supply voltage of a power amplifier are applied to the mapping function to generate control signals which vary the impedance characteristics of a variable impedance device. The output of the mapping function includes control signals that control optimized impedance characteristics of a variable impedance device as a function of the variation of the supply voltage to a power amplifier. The coefficients of the mapping function may be regularly determined based on a comparison of out-of-band power and in-band power transmitted by an antenna.

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

A power amplifier system for amplifying an input having a carrier frequency having an amplitude. The system includes a plurality of n amplifiers coupled to an asymmetrical combiner formed of a passive network, each amplifier has an input and an output, the asymmetrical combiner has a plurality of inputs and an output, the output of each amplifier is coupled to an input of the asymmetrical combiner, an impedance viewed at the output of each of the n amplifiers is a function of the amplitude and phase at each of the other n−1 amplifiers. An amplitude/phase controller is coupled to the plurality of n amplifiers or the asymmetrical combiner to control the amplitude/phase at the asymmetrical combiner input. The amplitude/phase controller is configured to present an amplitude/phase at each input of the asymmetrical combiner to target an optimal impedance at the carrier frequency for each of the plurality of n amplifiers.

Provided is a power amplification circuit that includes: a first transistor that has an emitter to which a first radio frequency signal is supplied, a base to which a first DC control current or DC control voltage is supplied and a collector that outputs a first output signal that corresponds to the first radio frequency signal; a first amplifier that amplifies the first output signal and outputs a first amplified signal; and a first control circuit that supplies the first DC control current or DC control voltage to the base of the first transistor in order to control output of the first output signal.