H01L2224/48463

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS
20170213920 · 2017-07-27 ·

A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.

Thin film light emitting diode
09716213 · 2017-07-25 · ·

Light emitting devices comprise a substrate having a surface and a side surface; a semiconductor structure on the surface of the substrate, the semiconductor structure having a first surface, a second surface and a side surface, wherein the second surface is opposite the first surface, wherein the first surface, relative to the second surface, is proximate to the substrate, and wherein the semiconductor structure comprises a first-type layer, a light emitting layer and a second-type layer; a first and a second electrodes; and a wavelength converting element arranged on the side surface of the semiconductor structure, wherein the wavelength converting element has an open space, and wherein the open space is a portion not covered by the wavelength converting element.

FUNCTIONAL COMPONENT, FORMING METHOD THEREOF AND ELECTRONIC DEVICE
20250046699 · 2025-02-06 ·

Functional component, forming method thereof and electronic device are provided. The functional component includes a packaging substrate and a connecting wire. The packaging substrate includes a through-hole wire-bonding area including a first insulating layer and a wire-bonding electrode sequentially formed on the substrate. The first insulating layer includes a first through hole, and the wire-bonding electrode covers the first through hole. In an area corresponding to the first through hole, the packaging substrate has wire-bonding bump electrodes on a side of the wire-bonding electrode away from the first insulating layer. The connecting wire includes a wire-bonding connection portion and a wire-bonding extension portion connected to the wire-bonding connection portion. The wire-bonding connection portion is fixedly connected to the wire-bonding electrode. The wire-bonding connection portion extends to cover at least a partial area of a side of at least one of the wire-bonding bump electrodes.

Optoelectronic semiconductor chip

An optoelectronic semiconductor chip includes a semiconductor layer sequence having at least one active layer. Furthermore, the semiconductor chip has a top-side contact structure on a radiation main side of the semiconductor layer sequence and an underside contact structure on an underside situated opposite to the radiation main side. Furthermore, the semiconductor chip includes at last two trenches that extend from the radiation main side towards the underside. As seen in a plan view of the radiation main side, the top-side contact structure and the underside contact structure are arranged in a manner spaced apart from one another. Likewise as seen in a plan view of the radiation main side, the trenches are located between the top-side contact structure and the underside contact structure.

Environmental hardened packaged integrated circuit

A packaged integrated circuit for operating reliably at elevated temperatures is provided. The packaged integrated circuit includes a modified extracted die, which includes one or more extended bond pads, a package comprising a base and a lid, and a plurality of new bond wires. The modified extracted die is placed into a cavity of the base. After the modified extracted die is placed into the cavity, the plurality of new bond wires are bonded between the one or more extended bond pads of the modified extracted die and package leads of the package base or downbonds. After bonding the plurality of new bond wires, the lid is sealed to the base.

Semiconductor device having low-dielectric-constant film
09711629 · 2017-07-18 · ·

Provided is a semiconductor device including a plurality of trenches, including an emitter electrode; a floating layer of a first conduction type provided between adjacent trenches; and a low-dielectric-constant film provided between the floating layer and the emitter electrode, in which a dielectric constant of the low-dielectric-constant film is less than 3.9. Also provided is a semiconductor device further including a gate electrode formed in the trenches, in which capacitance between the gate electrode and the floating layer is greater than capacitance between the emitter electrode and the floating layer.

Illumination Device
20170200872 · 2017-07-13 ·

There is proposed an illuminating device, comprising (a) a luminous element, (b) a support, and (c) a primary optical element,
characterized in that (i) said luminous element (a) is present on the support (b), and (ii) said primary optical element (c) is arranged on the composite of luminous element (a) and support (b) in such a way that it takes up, directs and emits the radiation emerging from the luminous element in the desired light distribution, wherein (iii) said primary optical element (c) is fabricated from a high refractive index glass and (iv) attached to the support by direct bonding.

BONDING WIRE FOR SEMICONDUCTOR DEVICE
20170200690 · 2017-07-13 ·

There is provided a bonding wire for a semiconductor device including a coating layer having Pd as a main component on a surface of a Cu alloy core material and a skin alloy layer containing Au and Pd on a surface of the coating layer, the bonding wire further improving 2nd bondability on a Pd-plated lead frame and achieving excellent ball bondability even in a high-humidity heating condition. The bonding wire for a semiconductor device including the coating layer having Pd as a main component on the surface of the Cu alloy core material and the skin alloy layer containing Au and Pd on the surface of the coating layer has a Cu concentration of 1 to 10 at % at an outermost surface thereof and has the core material containing either or both of Pd and Pt in a total amount of 0.1 to 3.0% by mass, thereby achieving improvement in the 2nd bondability and excellent ball bondability in the high-humidity heating condition. Furthermore, a maximum concentration of Au in the skin alloy layer is preferably 15 at % to 75 at %.

BONDING WIRE FOR SEMICONDUCTOR DEVICE

A bonding wire includes a Cu alloy core material, and a Pd coating layer formed on the Cu alloy core material. The bonding wire contains at least one element selected from Ni, Zn, Rh, In, Ir, and Pt. A concentration of the elements in total relative to the entire wire is 0.03% by mass or more and 2% by mass or less. When measuring crystal orientations on a cross-section of the core material in a direction perpendicular to a wire axis of the bonding wire, a crystal orientation <100> angled at 15 degrees or less to a wire axis direction has a proportion of 50% or more among crystal orientations in the wire axis direction. An average crystal grain size in the cross-section of the core material in the direction perpendicular to the wire axis of the bonding wire is 0.9 m or more and 1.3 m or less.

Integrated system and method of making the integrated system
09704843 · 2017-07-11 · ·

A system and method of manufacturing a system are disclosed. An embodiment of the system includes a first packaged component comprising a first component and a first redistribution layer (RDL) disposed on a first main surface of the first packaged component, wherein the first RDL includes first pads. The system further includes a second packaged component having a second component disposed at a first main surface of the second packaged component, the first main surface having second pads and a connection layer between the first packaged component and the second packaged component, wherein the connection layer connects a first plurality of the first pads with the second pads.