A semiconductor device includes a substrate, a semiconductor chip having a first surface bonded to the substrate and a second surface that is opposite to the first surface and includes a first electrode pad and a second electrode pad thereon, the first electrode pad being electrically connected to a circuit of the semiconductor chip that is operated during operation of the semiconductor device and the second electrode pad being electrically separated from the circuit, a first wire extending between the first electrode pad and a terminal of the substrate that is electrically connected with an external device during operation of the semiconductor device, a second wire extending between the second electrode pad and the substrate, and a resin layer formed over the second surface of the semiconductor chip and covering the first and second wires.

A flip chip type laser diode includes a removable substrate, a first semiconductor layer, an emitting layer, a second semiconductor layer, at least one current conducting layer, a patterned insulating layer, at least one first electrode and a second electrode. The first semiconductor layer is disposed on the removable substrate. The emitting layer is disposed on a part of the first semiconductor layer. The second semiconductor layer is disposed on the emitting layer and forms a ridge mesa. The current conducting layer is disposed on a part of the first semiconductor layer. The patterned insulating layer covers the first semiconductor layer, the emitting layer, a part of the second semiconductor layer and a part of the current conducting layer. The first electrode and the second electrode are disposed on areas of the current conducting layer and the second semiconductor layer which are not covered by the patterned insulating layer.

An imaging apparatus that forms an image of a light beam transmitted through an imaging lens on an imaging element includes a laminated material that is provided on the imaging element, the light beam being transmitted through the laminated material, the laminated material being provided at a position at which an end portion of an upper surface of the laminated material allows an outermost light beam out of light beams to be transmitted therethrough, the light beams entering a pixel in an outer end portion of the imaging element in an effective pixel area, the position having a width Hopt.

A noble metal-coated copper wire for ball bonding, with a wire diameter between 10 m or more, and 25 m or less, includes a core material having a copper alloy having a copper purity of 98 mass % or higher, and a noble metal-coating layer formed on the core material. The noble metal-coating layer includes a palladium cavitating layer containing palladium; at least one element selected from the group consisting of Group 13 to 16 elements or an oxygen element, finely dispersed in the palladium; and a diffusion layer formed of copper diffused into the palladium. The noble metal-coating layer may include a palladium cavitating layer containing palladium, at least one element selected from the group consisting of Group 13 to 16 elements or an oxygen element, finely dispersed therein, and a nickel intermediate layer disposed between the core material and the noble metal-coating layer.

To achieve high processing capability, a semiconductor device includes first and second circuits, first to third wirings, and first to fourth transistors. The first circuit is electrically connected to the first wiring and a gate of the first transistor. One of a source and a drain of the first transistor is electrically connected to the second wiring. The other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor. The second circuit is electrically connected to the first wiring and a gate of the third transistor. One of a source and a drain of the third transistor is electrically connected to the third wiring. The other of the source and the drain of the third transistor is electrically connected to a gate of the fourth transistor. One of a source and a drain of the fourth transistor is electrically connected to one of a source and a drain of the second transistor. The other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the second transistor.

An ultraviolet light emitting apparatus may include a chamber, at least one semiconductor light emitting device, an electron beam irradiation source, and first and second connection electrodes configured to apply a voltage from an external power source to the at least one semiconductor light emitting device. The chamber may define an internal space and include a light emission window. The at least one semiconductor light emitting device may be on the light emission window and include a first conductivity type nitride semiconductor layer, an undoped nitride semiconductor layer, and an active layer between the first conductivity type nitride semiconductor layer and the undoped nitride semiconductor layer. The electron beam irradiation source may be in the internal space of the chamber and configured to irradiate an electron beam onto the undoped nitride semiconductor layer.

A 3D semiconductor device, including: a first layer including first transistors; a second layer overlaying the first layer, the second layer including second transistors, where the second layer includes at least one thru layer via with a diameter less than 200 nm, where the second layer includes an oscillator, and where the oscillator has a frequency stability of less than 100 ppm error/ C.

An isolation device for isolating a first signal of a first circuit from a second circuit disclosed. The isolation device may have a substrate and a plurality of metal layers disposed on the substrate. The plurality of metal layers have a topmost metal layer disposed furthest away from the substrate and a first interconnect metal layer formed nearest to the substrate. The first interconnect metal layer is disposed at a first distance away from the substrate, whereas the topmost metal layer is disposed at an isolation distance away from a first adjacent metal layer formed nearest to the topmost metal layer. A portion of the topmost metal layer forms a first plate. The first plate is configured to transmit the first signal from the first circuit to a second plate that is connected to the second circuit, but electrically isolated from the first plate.

A sensor includes a body having a sensor surface and an oblique surface. A sensor element is arranged on the sensor surface and configured to pick up a direction component of a directional measurement variable. At least one contact-making surface configured to make contact with the sensor element is arranged on the oblique surface. The oblique surface is at an angle with respect to a lattice structure of carrier material of the sensor and is oriented in a different direction than the sensor surface.

The present invention provides a bonding wire which can satisfy bonding reliability, spring performance, and chip damage performance required in high-density packaging. A bonding wire contains one or more of In, Ga, and Cd for a total of 0.05 to 5 at %, and a balance being made up of Ag and incidental impurities.